ESS 520000: Microelectronic Engineering

Spring 2015

Tuesday 10:10~12:00 / Thursday 10:10~12:00

ESS Building 506

 

Instructor:Yung-Hsien Wu

Office: ESS Building 314

Office Hours: Monday 1:30~3:30 pm or by appointment

Phone: 62248

Email: yunhwu@mx.nthu.edu.tw

Textbook:

J.D. Plummer, Silicon VLSI Technology: Fundamentals, Practice and Modeling, Pearson Education, 2009.

M. Quirk and J. Serda, Semiconductor Manufacturing Technology, Pearson Education, 2011.

Reference: 

1.      C. Y. Chang and S. M. Sze, ULSI Technology, McGraw Hill Book Com, 1996.

2.      S. M. Sze, Physics of Semiconductor Devices, Wiley

3.      Y. Taur and T. Ning, Fundamentals of Modern VLSI Devices, Cambridge Univ. Press, 1998.

4.      Wolf, Silicon Processing for the VLSI Era Vol.2: Process Integration, Lattice Press, 1990.

5.      Wolf and Tauber, Silicon Processing for the VLSI Era Vol.1: Process Technology, Lattice Press, 1986.  

6.      S. A. Campbell, The Science and Engineering of Microelectronic Fabrication, Oxford Univ. Press, 2001

Syllabus

Assume that students have possessed basic knowledge of semiconductor physics and devices, this class will expose the students to silicon MOS device processing, the fabrication steps, processing equipment and important science and engineering theoretical aspects. The following topics will be addressed in this course.

1.      Introduction and Historical Perspect

2.      IC Process Overview

3.      Crystal Growth, Wafer Fab and Properties

4.      Semiconductor Manufacturing-Clean Rooms, Wafer Clean, and Gettering

5.      Photolithography

6.      Thin Film Deposition

7.      Metallization

8.       “Modern” Topics

R Trend for CMOS Scaling

R High-k Dielectrics

R Advanced Devices

Course Objectives:

1.      Understanding the impact of the physical and chemical processes of integrated circuit fabrication technology on the design of integrated circuits.

2.      Understanding physics of the crystal growth, wafer fabrication and basic properties of silicon wafers.

3.      Learning CMOS process flow from choosing a substrate, forming active region, formation of N and P well, gate, LDD, source/drain, local interconnects, and multilevel metal.

4.       Learning concepts of dopant solid solubility, diffusion macroscopic point, and different solutions to diffusion equation.

5.      Learning concepts of ion implantation, role of the crystals structures, high-energy implants, ultralow energy implants and ion beam heating methods.

6.      Learning concepts of thin film deposition including chemical vapor deposition and physical vapor deposition.

7.      Learning concepts of wet etching, and plasma etching mechanism and systems.

8.      Understanding the following topics

R What are the challenges current ULSI technology has faced?

R How are advanced ULSI devices designed and fabricated?

R What are the implications for device electrical performance caused by fabrication techniques?

Handout:

Download from website.

Grading:

No make-up exam. The final grade will depend on the items with relative weights shown below:

Ø  Midterm ..………….35%

Ø  Final Exam………...35%   

Ø  Final Oral and Written Report ……30%

    

 

　

　

　

                                

　

　

　

 

                     

　

　

               

　

　

                                                                                                           

　

　

　

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