Journal Papers       Conferences      Patents    

                           Journal Papers

1

 Improved Electrical Characteristics of CoSi2 Using HF-Vapor Pretreatment
Y. H. Wu, W. J. Chen, S. L. Chang, A. Chin, S. Gwo, and C. Tsai
IEEE Electron Device Lett., vol. 20, no. 5, pp. 200-202, 1999.

2

 The Effect of Native Oxide on Epitaxial SiGe from Deposited Amorphous Ge on Si
Y. H. Wu, W. J. Chen, A. Chin, and C. Tsai
Appl. Phys. Lett., vol. 74, no. 4, pp. 528-530, 1999
  3 Gate Oxide Integrity of Thermal Oxide Grown on High Temperature Formed Si0.3Ge0.7
Y. H. Wu and Albert Chin
IEEE Electron Device Lett., vol. 21, no. 3, pp. 113-115, 2000
  4 High Temperature Formed SiGe p-MOSFETs with Good Device Characteristics
Y. H. Wu and Albert Chin
IEEE Electron Device Lett., vol. 21, no. 7, pp. 350-352, 2000
  5 Electrical Characteristics of High Quality La2O3 Gate Dielectric with Equivalent Oxide Thickness of 5Å
Y. H. Wu, M. Y. Yang, Albert Chin, W. J. Chen and C. M. Kwei
IEEE Electron Device Lett., vol. 21, no. 7, pp. 341-343, 2000
  6 The Fabrication of Very High Resistivity Si with Low Loss and Cross Talk
Y. H. Wu, Albert Chin, K. H. Shih, C. C. Wu, C. P. Liao, S. C. Pai, and C. C. Chi
IEEE Electron Device Lett., vol. 21, no. 9, pp. 442-444, 2000
  7 Thickness Dependent Gate Oxide Quality of Thin Thermal Oxide Grown on High Temperature Formed SiGe
Y. H. Wu, Albert Chin, and W. J. Chen
IEEE Electron Device Lett., vol. 21, no. 6, pp. 289-291, 2000
  8 High Quality Thermal Oxide Grown on High Temperature Formed SiGe
Y. H. Wu, S. B. Chen, A. Chin
J. Electrochem. Soc., vol. 147, no. 5, pp. 1962-1964, 2000
  9 The Buried Oxide Property in Oxygen Plasma Enhanced Low-Temperature Wafer Bonding
Y. H. Wu, C. H. Huang, W. J. Chen, C. N. Lin, and Albert Chin
J. Electrochem. Soc., vol. 147, no. 7, pp. 2754-2756, 2000
  10 The Effect of Copper on Gate Oxide Integrity
Y. H. Lin, Y. H. Wu, A. Chin, and F. M. Pan
J. Electrochem. Soc., vol. 147, no. 11, pp. 4305-4306, 2000
  11 Boron-Retarded Gate Dielectric Formed by Dry Oxidation of Thermal Nitride
Yung-Hsien Wu, Alex Ku, Jiun Fang Wang
J. Electrochem. Soc., vol. 151, no. 1, pp. F1–F6, 2004
  12 Process Window Enlargement for Borderless Contact Formation by A New BPSG Stack Structure
 Yung-Hsien Wu, Shi-Chuang Hsiao, Ping-Hong Lin, and Chia-Lin Ku
Electrochemical and Solid-State Lett., vol. 7, no. 1, pp. G1–G4, 2004.
  13 Extending Storage Dielectric Scaling Limit by Reoxidizing Nitrided NO Dielectric For Trench DRAM
Yung-Hsien Wu, Eugine Hsieh, Robert Kuo, Sierra Lai, and Chia-Lin Ku
IEEE Electron Device Lett., vol. 26, no. 2, pp. 66-68, 2005
14

Improved Electrical Characteristics of NO-Based Storage Dielectric by N2O Wet Oxidation and Postoxidation Treatment for Trench DRAM

Yung-Hsien Wu, Chun-Yao Wang, Hwei-Lin Chuang, Tony Kao, Ian Chang, Chia-Ming Kuo, and Alex Ku
Electrochemical and Solid-State Lett., vol. 9, no. 6, pp. G204–G207, 2006.
15

Oxide-Nitride Storage Dielectric Formation in a Single-Furnace Process for Trench DRAM
Yung-Hsien Wu, Ian Chang, Chun-Yao Wang, Tony Kao, Chia-Ming Kuo, and Alex Ku
IEEE Electron Device Lett., vol. 27, no. 9, pp. 734-736, 2006
16 High-Performance SrTiO3 MIM Capacitors for Analog Applications
K. C. Chiang, Ching-Chien Huang, G. L. Chen, Wen Jauh Chen, H. L. Kao, Yung-Hsien Wu, Albert Chin, and Sean P. McAlister
IEEE Trans. Electron Devices, vol. 53, no. 9, pp. 2312-2319, 2006 
17

A Method to Monitor the Quality of Ultra-Thin Nitride for Trench DRAM with Buried Strap Structure
Yung-Hsien Wu, Chun-Yao Wang, Ian Chang, Chien-Kang Kao, Chia-Ming Kuo, and Alex Ku
Semiconductor Science and Technology, vol. 22, no. 2, pp. 49-53, 2007
18

Thermal gate SiO2 for Ge Metal-Oxide-Semiconductor Capacitors Fabricated on Si Substrate
Yung-Hsien Wu, Jia-Rong Wu, Min-Lin Wu
Applied Physics Letters, vol. 91, p. 093503, 2007
19

Impact of Organic Contamination from Partially Fluorinated O-Ring in High Temperature Nitride Process on DRAM Performance
Yung-Hsien Wu, Chun-Yao Wang, Chia-Ming Kuo, and Alex Ku
IEEE Trans. Semiconductor Manufacturing, vol. 21, no. 1, pp. 123-126, 2008.
20

Augmented Cell Performance of NO-Based Storage Dielectric by N2O Treated Nitride Film for Trench DRAM

Yung-Hsien Wu, Chih-Ming Chang, Chun-Yao Wang, Chien-Kang Kao, Chia-Ming Kuo, Alex Ku, and Tensor Huang
IEEE Electron Device Lett., vol. 29, no. 2, pp. 149-151, 2008.  
21

A Process for In-Line Minority Carrier Lifetime Monitoring for the Furnace Performing Denuded Zone Formation

Yung-Hsien Wu, Chun-Yao Wang, Chih-Ming Chang,  Chien-Kang Kao, Chia-Ming Kuo, and Alex Ku
IEEE Trans. Semiconductor Manufacturing, vol. 21, no. 2, pp. 248-255, 2008.
22 High Density Silicon Nanocrystal Formed on Nitrided Tunnel Oxide for Nonvolatile Memory Application

Yung-Hsien Wu,  Chien-Kang Kao, Chun-Yao Wang, Yuan-Sheng Lin, Chih-Ming Chang, Chih-Hsiang Chuang, Chia-Yun Lee, Chia-Ming Kuo and Alex Ku
Electrochemical and Solid-State Lett., vol. 11, no. 6, pp. H131–H134, 2008.
23

High Density Metal-Insulator-Metal Capacitor Based on ZrO2/Al2O3/ZrO2        

Yung-Hsien Wu, Chien-Kang Kao, Bo-Yu Chen, Yuan-Sheng Lin, Ming-Yen Li and Hsiao-Che Wu
Applied Physics Letters, vol. 93, p. 033511, 2008.
24 Thermal SiO2 Gated Ge Metal-Oxide-Semiconductor Capacitor on Si Substrate Formed by Thin Amorphous Ge Oxidation and Thermal Annealing

Yung-Hsien Wu, Jia-Rong Wu, Yuan-Sheng Lin and Min-Lin Wu

Applied Physics Letters, vol. 93, p. 083506, 2008.
25 Performance-Augmented Storage Capacitor by Reduced Resistance of Polysilicon Electrode for Trench DRAM

Yung-Hsien Wu,  Chun-Yao Wang, Chih-Ming Chang, Chia-Ming Kuo, Alex Ku
Materials Science in Semiconductor Processing, vol. 11, no. 2, pp. 48-52, 2008. 
26 Electrical Characteristics of Thermal SiON Gated Ge p-MOSFET Formed on Si Substrate

Yung-Hsien Wu, Min-Lin Wu, Yuan-Sheng Lin, and Jia-Rong Wu
IEEE Electron Device Lett.,  vol. 30, no. 1, pp. 72-74, 2009.
27

Impact of Preanneal Process on Threshold Voltage of MOS Transistors for Trench DRAM
Yung-Hsien Wu, Chih-Ming Chang, Chun-Yao Wang, Chien-Kang Kao, Chia-Ming Kuo and Alex Ku
Microelectronics Engineering, vol. 86, no. 1, pp. 33-36, 2009.
28

Nonvolatile Memory with TiN Nanocrystals Three-Dimensionally Embedded in Si3N4 Formed by Spinodal Phase Segregation
Yung-Hsien Wu, Lun-Lun Chen, Yuan-Sheng Lin, Chia-Hsuan Chang, Jia-Hong Huang, and Ge-Ping Yu
IEEE Electron Device Lett., vol. 30, no. 6, pp. 617-619, 2009.
29 Metal-Insulator-Metal Capacitor with High Capacitance Density and Low Leakage Current using ZrTiO4 Film
Yung-Hsien Wu, Lun-Lun Chen, Bo-Yu Chen, Jia-Rong Wu, and Min-Lin Wu
Applied Physics Letters, vol. 95, p. 113502, 2009.
30 Ge-based Silicon-Oxide-Nitride-Oxide-Silicon-Type Nonvolatile Memory Formed on Si Substrate
Yung-Hsien Wu, Jia-Rong Wu , Min-Lin Wu , Lun-Lun Chen , Yuan-Sheng Lin
J. Electrochem. Soc., vol. 156, no. 12, pp. H944-H947, 2009
31 Nitrided Tetragonal ZrO2 as the Charge-Trapping Layer for Nonvolatile Memory Application
Yung-Hsien Wu, Lun-Lun Chen, Yuan-Sheng Lin, Ming-Yen Li and Hsiao-Che Wu
IEEE Electron Device Lett., vol. 30, no. 12, pp. 1290-1292, 2009.
32 Selective Emitter Solar Cell Formation by NH3 Plasma Nitridation and Single Diffusion
Yung-Hsien Wu, Lun-Lun Chen, Jia-Rong Wu, and Min-Lin Wu
Semiconductor Science and Technology, vol. 25, no. 1, pp. 015001, 2010
33

Selective Emitter Solar Cell Formation by NH3 Plasma Nitridation and Single Diffusion

Yung-Hsien Wu, Lun-Lun Chen, Jia-Rong Wu, and Min-Lin Wu

Semiconductor Science and Technology, vol. 25, no. 1, pp. 015001, 2010

34

Impact of Top Electrode on Electrical Stress Reliability of Metal-Insulator-Metal Capacitor With Amorphous ZrTiO4 Film

Yung-Hsien Wu, Chia-Chun Lin, Lun-Lun Chen, Bo-Yu Chen, Min-Lin Wu, and Jia-Rong Wu

Appl. Phys. Lett., vol. 96, p. 133501, 2010.
35

Structure and Property Changes of ZrO2/Al2O3/ZrO2 Laminate Induced by Low-Temperature NH3 Annealing Applicable To Metal-Insulator-Metal Capacitor

Yung-Hsien Wu Ming-Yen Li, Bin-Siang Tsai, Pei-Chuen Jiang, Hsiao-Che Wu, , Yu-Jen Lin

Thin Solid Films, vol. 518, no. 18, pp. 5272-5277, 2010.
36

Electrical Characteristics of Ge MOS Device on Si Substrate With Thermal SiON as Gate Dielectric

Yung-Hsien Wu, Min-Lin Wu, Jia-Rong Wu, and Yuan-Sheng Lin

Microelectronics Engineering, vol. 87, no. 11, pp. 2423-2428, 2010
37

Ge-stabilized Tetragonal ZrO2 as Gate Dielectric for Ge MOS Capacitors Fabricated on Si Substrate,

Yung-Hsien Wu, Min-Lin Wu, Jia-Rong Wu, and Lun-Lun Chen

Appl. Phys. Lett., vol. 97, p. 043503, 2010.
38

Tetragonal ZrO2/Al2O3 Stack as High-κ Gate Dielectric for Si-Based MOS Devices

Yung-Hsien Wu, Lun-Lun Chen, Rong-Jhe Lyu, Ming-Yen Li and Hsiao-Che Wu

IEEE Electron Device Lett., vol. 31, no. 9, pp. 1014-1016, 2010.
39

(ZrO2)x(La2O3)1-x Alloy as High-k Gate Dielectric for Advanced CMOS Devices

Yung-Hsien Wu Lun-Lun Chen, Chin-Yao Hou, Jia-Rong Wu, Min-Lin Wu, and  Rong-Jhe Lyu

ECS Trans., vol. 33, 2010.
40

Nonvolatile Memory With Nitrogen-Stabilized Cubic Phase ZrO2 as Charge Trapping Layer

Yung-Hsien Wu, Lun-Lun Chen, Jia-Rong Wu, Min-Lin Wu, Chia-Chun Lin and Chia-Hsuan Chang

IEEE Electron Device Lett., vol. 31, no. 9, pp. 1008-1010, 2010.
41

High-Performance Metal-Insulator-Metal Capacitor With Ge-Stabilized Tetragonal ZrO2/Amorphous La-doped ZrO2 Dielectric

Yung-Hsien Wu, Chia-Chun Lin, Lun-Lun Chen, Yao-Chung Hu, Jia-Rong Wu, and Min-Lin Wu

Appl. Phys. Lett., vol. 98, p. 013506, 2011.
42

Ge-Based Nonvolatile Memory Formed on Si Substrate With Ge-Stabilized Tetragonal ZrO2 as Charge Trapping Layer Featuring Low Voltage Operation

Yung-Hsien Wu, Jia-Rong Wu, Min-Lin Wu, Lun-Lun Chen and Chia-Chun Lin

Journal of The Electrochemical Society, vol. 158, no. 4, pp. H410-H416, 2011
43

MOS Devices With Tetragonal ZrO2 as Gate Dielectric Formed by Annealing ZrO2/Ge/ZrO2 Laminate

Yung-Hsien Wu, Lun-Lun Chen, Wei-Chia Chen, Chia-Chun Lin, Min-Lin Wu, and Jia-Rong Wu

Microelectronics Engineering, vol. 88, no. 7, pp. 1361-1364, 2011.
44

Comparison of Ge Surface Passivation Between SnGeOx Films Formed by Oxidation of Sn/Ge and SnGex/Ge Structures

Yung-Hsien Wu, Min-Lin Wu, Rong-Jhe Lyu, Jia-Rong Wu, Chia-Chun Lin and Lun-Lun Chen

IEEE Electron Device Lett., vol. 32, no. 5, pp. 611-613, 2011.
45

Crystalline ZrO2-Gated Ge Metal-Oxide-Semiconductor Capacitors Fabricated on Si Substrate With Y2O3 as Passivation Layer

Yung-Hsien Wu, Min-Lin Wu, Rong-Jhe Lyu, Jia-Rong Wu, Lun-Lun Chen, and Chia-Chun Lin

Appl. Phys. Lett., vol. 98, p. 203502, 2011.
46

High-Performance Metal-Insulator-Metal Capacitor Using Stacked TiO2/Y2O3 as Insulator

Yung-Hsien Wu, Chia-Chun Lin, Yao-Chung Hu, Min-Lin Wu, Jia-Rong Wu, and Lun-Lun Chen

IEEE Electron Device Lett., vol. 32, no. 8, pp. 1107-1109, 2011
47

Impact of Fluorine Treatment on Fermi Level Depinning for Metal/Germanium Schottky Junctions

Yung-Hsien Wu,  Jia-Rong Wu (My PhD student) Chin-Yao Hou, Min-Lin Wu, Chia-Chun Lin and Lun-Lun Chen

Appl. Phys. Lett., vol. 99, p. 253504, 2011.
48

Long-Endurance Nanocrystal TiO2 Resistive Memory Using a TaON Buffer Layer

C. H. Cheng, P. C. Chen (My PhD student), Y. H. Wu, F. S. Yeh, and A. Chin

IEEE Electron Device Lett., vol. 32, no. 12, pp. 1749-1751, 2011.
49

MIM Capacitors With Crystalline-TiO2/SiO2 Stack Featuring High Capacitance Density and Low Voltage Coefficient

Yung-Hsien Wu, Wei-Yuan Ou, Chia-Chun Lin, Jia-Rong Wu, Min-Lin Wu and Lun-Lun Chen

IEEE Electron Device Lett., vol. 33, no. 1, pp. 104-106, 2012.
50

MOS Devices With High-κ (ZrO2)x(La2O3)1-x Alloy as Gate Dielectric Formed by Depositing ZrO2/La2O3/ZrO2 Laminate and Annealing

Yung-Hsien Wu, Lun-Lun Chen, Rong-Jhe Lyu, Jia-Rong Wu, Min-Lin Wu, and Chia-Chun Lin

Accepted for publication in IEEE Trans. NanoTech.
51

ZrTiOx-Based Resistive Memory With MIS Structure Formed on Ge Layer

Yung-Hsien Wu, Jia-Rong Wu, Chin-Yao Hou, Chia-Chun Lin, Min-Lin Wu, and Lun-Lun Chen

Accepted for publication in IEEE Electron Device Lett., vol. 33, no. 3, 2012.
52

Integration of Amorphous Yb2O3 and Crystalline ZrTiO4 as Gate Stack for Aggressively Scaled MOS Devices

Yung-Hsien Wu, Rong-Jhe Lyu, Min-Lin Wu, Lun-Lun Chen, Chia-Chun Lin and Jia-Rong Wu

Accepted for publication in IEEE Electron Device Lett., vol. 33, no. 3, 20

　

  

　

　

　

　

　

　

　

　

　

　

　

　

　

　

　

                   

                   

　

　

　

　

　

　

　

　

                    

　

　

                        

                 

　

                  

　

　

　

　

              

　

             

　

　

　

　

　

　

             

　

                    

　

　

　

　

　

　

　

                   

　

                  

　

                 

　

 

　

　

　

　

　

　

　

　

　

　

　

　

　

　

　

　

　

　

　

　

　

　

　

　

　

　

　

　

　

　

　

　

　

　

　

　

　

　

　

　

　

　

　

　

　

　

　

　

                           Conference Papers

  1 Electrical and Structure Characterization of Single Crystalline SiGe Formed by Ge Deposition and RTP
Y. H. Wu, W. J. Chen, A. Chin, and C. Tsai
The 41st TMS Electronic Materials Conference (EMC) Dig., 1999.
  2 High Quality La2O3 and Al2O3 Gate Dielectrics with Equivalent Oxide Thickness 5-10Å
Albert Chin, Y. H. Wu, S. B. Chen, C. C. Liao, and W. J. Chen
Symp. on VLSI Tech., 2000, pp. 16-17.
  3 The Performance Limiting Factors as RF MOSFETs Scaling Down
Y. H. Wu, Albert Chin, C. S. Liang, and C. C. Wu
IEEE Radio Frequency Integrated Circuits (RFIC) Symposium, 2000, pp. 151-154.
  4 RF Loss and Cross Talk on Extremely High Resistivity (10k-1m Ohm-cm) Si Fabricated by Ion Implantation
Y. H. Wu, Albert Chin, K. H. Shih, C. C. Wu, C. P. Liao, S. C. Pai, and C. C. Chi
IEEE International Microwave Symposium, 2000, pp. 221-224.
  5 Improved Shallow Junction Integrity Using Single Crystalline CoSi2
Y. H. Wu, K. T. Chan, S. B. Chen, W. J. Chen, and Albert Chin
The 42nd TMS Electronic Materials Conference (EMC) Dig., 2000.
  6 High Quality Thermal Ultra-Thin Gate Oxide Directly Grown on High Temperature Formed Si0.3Ge0.7
S. B. Chen, C. H. Huang, Y. H. Wu, W. J. Chen, and Albert Chin
The 42nd TMS Electronic Materials Conference (EMC) Dig., 2000.
  7 High Frequency Characterization of Mega-Ohm Resistivity Si Formed by High-Energy Ion Implantation
Y. H. Wu, M. Y. Yang, S. B. Chen, W. J. Chen, Albert Chin, and C. M. Kwei
The 42nd TMS Electronic Materials Conference (EMC) Dig., 2000.
  8 Gate Dielectric Formed by Dry Oxidation of Thermal Nitride and Its Capability to Prevent Boron Penetration
Yung-Hsien Wu, Alex Ku, Jiun Fang Wang
The 44th TMS Electronic Materials Conference (EMC) Dig., 2002.
  9 The Modeling of Temperature Distribution on Vertical LPCVD Furnace for Depositing Film on Deep Trench Pattern Wafer
Chun-Yao Wang, Yung-Hsien Wu, Chia-Lin Ku
The 20th VLSI Multilevel Interconnection Conference (VMIC) Dig., 2003.
  10 The Effect of In-Situ Liner Oxide on Threshold Voltage and Its Application to Enhance Yield Stability
Yung-Hsien Wu, Chun-Yao Wang, Wen-Haw Hsieh, Pen-Yi Chang, and Chia-Lin Ku
The 21st VLSI Multilevel Interconnection Conference (VMIC) Dig., 2004.
  11 Increasing of Arsenic Diffusion into Silicon From Arsenic-Doped Oxide Source on Deep Trench Based Capacitor DRAM
Chun-Yao Wang, Yung-Hsien Wu, Chia-Lin Ku
The 21st VLSI Multilevel Interconnection Conference (VMIC) Dig., 2004.
12

Very Low Voltage and High Speed MONOS Nonvolatile Memory
A. Chin, C. H. Lai, K. C. Chiang, W. J. Chen, Y. H. Wu, and H. L. Hwang
The 7th International Conference on Solid-State and Integrated-Circuit Technology (ICSICT), 2006.
13 Resistance Reduction of n+ Poly-Silicon Fill for Storage Capacitance in Trench DRAM
Chun-Yao Wang, Yung-Hsien Wu, Chi-Yao Teng, Chien-Kang Kao, Chia-Ming Kuo, Alex Ku, Tensor Huang
The 211th Meeting of The Electrochemical Society (ECS) Dig., 2007.
14 Improved Cell Performance of NO-Based Storage Dielectric by N2O Treated Nitride Film for Trench DRAM
Chih-Ming Chang, Yung-Hsien Wu, Chien-Kang Kao, Chun-Yao Wang, Chia-Ming Kuo, Alex Ku, and Tensor Huang
The 49th TMS Electronic Materials Conference (EMC) Dig., 2007.
15

Nonvolatile Memory with High Density Silicon Nanocrystal Formed on Nitrided Tunnel Oxide

Yung-Hsien Wu, Chun-Yao Wang, Chien-Kang Kao, Chih-Ming Chang, Yuan-Sheng Lin, Chia-Yun Lee, Chih-Hsiang Chuang, Chia-Ming Kuo and Alex Ku
International Conference on Nanoscience and Nanotechnology (ICONN), Melbourne, Australia, 2008.
16

High-Performance MIM Capacitor Using ZrO2/Al2O3/ZrO2 Dielectric 

Bo-Yu Chen, Yuan-Sheng Lin, Yung-Hsien Wu, Chien-Kang Kao, Ming-Yen Li and Hsiao-Che Wu
The 214th Meeting of The Electrochemical Society (ECS) Dig., 2008.
17 Electrical Characteristics of Ge p-MOSFETs Formed on Si Substrate with Thermal SiON as Gate Dielectric

Yung-Hsien Wu, Min-Lin Wu, Jia-Rong Wu and Yuan-Sheng Lin
International Conference on Solid State Devices and Materials (SSDM), Tsukuba, Japan, 2008.
18

Hybrid TiN Nanocrystals/Si3N4 Nonvolatile Memory Featuring Low Voltage Operation by Spinodal Phase Segregation

Lun-Lun Chen, Chia-Hsuan Chang, Yuan-Sheng Lin and Yung-Hsien Wu
Device Research Conference, Penn State University, USA, 2009.
19 Ge Nanocrystals Embedded in SiON as the Hybrid Charge Trapping Layer for Nonvolatile Memory Application
Min-Lin Wu, Jia-Rong Wu, Lun-Lun Chen, and Yung-Hsien Wu
Conference on Nano and Giga Challenges in Electronics, Photonics and Renewable Energy, Hamiltion, Canada, 2009
20 Nonvolatile Memory with Nitrided Tetragonal ZrO2 as Charge- Trapping Layer
Lun-Lun Chen, Min-Lin Wu, Jia-Rong Wu, Yung-Hsien Wu, Ming-Yen Li, and Hsiao-Che Wu
Conference on Nano and Giga Challenges in Electronics, Photonics and Renewable Energy, Hamiltion, Canada, 2009
21 SONOS-Type Nonvolatile Memory Fabricated on Thin Epitaxial Ge on Si Substrate
Jia-Rong Wu, Lun-Lun Chen, Min-Lin Wu, and Yung-Hsien Wu
Conference on Nano and Giga Challenges in Electronics, Photonics and Renewable Energy, Hamiltion, Canada, 2009
22 SONOS-Type Nonvolatile Memory Formed on Epitaxial-Ge Layer on Si Substrate
Jia-Rong Wu, Min-Lin Wu, Lun-Lun Chen, Yuan-Sheng Lin, and Yung-Hsien Wu
International Conference on Solid State Devices and Materials (SSDM), Miyagi, Japan, 2009
23 Nonvolatile Memory with Nitrided Tetragonal ZrO2 as Charge-Trapping Layer
Lun-Lun Chen, Yuan-Sheng Lin, Yung-Hsien Wu, Ming-Yen Li and Hsiao-Che Wu
International Electron Devices and Materials Symposia (IEDMS), Taiwan, 2009.
24 MIM Capacitors with ZrTiO4 as Insulator Featuring High Capacitance Density and Low Leakage Current
Chia-Chun Lin, Bo-Yu Chen, Lun-Lun Chen, Min-Lin Wu, Jia-Rong Wu and Yung-Hsien Wu

IEEE International NanoElectronics Conference (INEC), Hong-Kong, 2010.
25

Cubic ZrO2 as Charge-Trapping Layer for Nonvolatile Memory Application

Yao-Chung Hu, Lun-Lun Chen, Jia-Rong Wu, Min-Lin Wu, Chia-Hsuan Chang, and Yung-Hsien Wu

in The 217th Meeting of The Electrochemical Society (ECS) Dig., Vancouver, Canada, 2010.
26

Tetragonal ZrO2-Gated Ge MOS Capacitors Fabricated on Si Substrate

Min-Lin Wu, Lun-Lun Chen, Jia-Rong Wu, and Yung-Hsien Wu

in The 217th Meeting of The Electrochemical Society (ECS) Dig., Vancouver, Canada, 2010.
27

Metal-Gate/High-κ CMOS Scaling from Si to Ge at Small EOT

A. Chin, W. B. Chen B. S. Shie, K. C. Hsu, P. C. Chen, C. H. Cheng, C. C. Chi, Y. H. Wu, K. S. Chaing-Liao, S. J. Wang, C. H. Kuan, and F. S. Yeh

in The 10th Int’l Conf. on Solid-State and Integrated-Circuit Technology (ICSICT), 2010.
28

(ZrO2)x(La2O3)1-x Alloy as High-k Gate Dielectric for Advanced CMOS Devices

Chin-Yao Hou, Lun-Lun Chen, Jia-Rong Wu, Min-Lin Wu, Rong-Jhe Lyu and Yung-Hsien Wu

in The 218th Meeting of The Electrochemical Society (ECS) Dig., Las Vegas, USA, 2010.
29

MIM Capacitors With Stacked TiO2/Y2O3 Insulator Featuring High Capacitance Density and Low Leakage Current

Chia-Chun Lin, Yao-Chung Hu, Lun-Lun Chen, Min-Lin Wu, Jia-Rong Wu and Yung-Hsien Wu

in International Conference on Solid State Devices and Materials (SSDM), Tokyo, Japan, 2010.
30

Al2O3/Nitrided Tetragonal ZrO2 as Advanced Gate Stack

Lun-Lun Chen, Rong-Jhe Lyu, Yung-Hsien Wu, Ming-Yen Li and Hsiao-Che Wu

in International Electron Devices and Materials Symposia (IEDMS), Taiwan, 2010.
31

MIM Capacitors With Ge-Stabilized Tetragonal ZrO2/La-Doped ZrO2 Dielectric Featuring High Capacitance and Low Leakage Current

Chia-Chun Lin, Yao-Chung Hu, Wei Yuan Ou, Lun-Lun Chen, Jia-Rong Wu, Min-Lin Wu and Yung-Hsien Wu

in International Electron Devices and Materials Symposia (IEDMS), Taiwan, 2010.
32

MOS Devices With Tetragonal ZrO2 as Gate Dielectric Formed by Annealing ZrO2/Ge/ZrO2 Laminate

Yung-Hsien Wu, Lun-Lun Chen, Wei-Chia Chen, Chia-Chun Lin, Min-Lin Wu, and Jia-Rong Wu

in Conference on Insulating Films on Semiconductors, Grenoble, France, 2011.
33

MIM Capacitors With High Capacitance Density and Low Quadratic Voltage Coefficient by Employing Crystalline-TiO2/SiO2 Stacked Dielectric

Chia-Chun Lin, Wei-Yuan Ou, Jia-Rong Wu, Min-Lin Wu, Lun-Lun Chen, and Yung-Hsien Wu

in International Conference on Solid State Devices and Materials (SSDM), Nagoya, Japan, 2011.
34

Fermi Level Depinning for Metal/Germanium Schottky Junction by CF4 Plasma Treatment

Jia-Rong Wu, Chin-Yao Hou, Min-Lin Wu, Chia-Chun Lin and Lun-Lun Chen, and Yung-Hsien Wu

in International Conference on Solid State Devices and Materials (SSDM), Nagoya, Japan, 2011.
35

ReRAM With Pt/Ti/ZrTiOx/Pt Structure Featuring Low-Voltage and High-Speed Operation

Chia-Chun Lin, Jia-Rong Wu, Chin-Yao Hou, Min-Lin Wu, and Lun-Lun Chen, Yung-Hsien Wu

in Subthreshold Microelectronics Conference, Lexington, MA, USA, 2011.
36

Resistive Switching Properties for ReRAM With Pt/Ti/ZrTiOx/Ge Structure Formed on Si Substrate

Jia-Rong Wu, Chia-Chun Lin, Chin-Yao Hou, Min-Lin Wu, and Lun-Lun Chen, Yung-Hsien Wu
in Subthreshold Microelectronics Conference, Lexington, MA, USA, 2011.

　

　

　

　

　

　

　

　

　

　

　

　

　

　

　

　

　

　

　

　

　

　

　

　

                     

                  

                   

　

　

               

　

　

　

             

　

　

 

                   

　

                  

　

　

　

　

　

　

　

　

　

　

　

　

　

　

　

　

　

　

　

　

　

　

　

　

　

　

　

　

　

　

　

　

　

　

　

　

　

　

　

　

　

　

　

　

　

　

　

　

　

　

                          Patents

  1

超薄氮化矽薄膜品質監控的方法
趙宗沛, 顧家麟, 巫勇賢
R.O.C. patent 159623, Jun. 14, 2001
  2 Method for Fabricating on Stack Structures in a Semiconductor Device
顧家麟, 巫勇賢
China patent 257920, Sep. 24, 2002
  3 形成氮氧化層的方法
顧家麟, 巫勇賢
R.O.C. patent 177607, Apr. 11, 2003
  4 Improve Memory Cell Capacitance by N2O Treatment of NO Stack Dielectric
Yung-Hsien Wu, Cheng-Che Lee
U.S.A. patent 6569731, May 27, 2003
  5 深溝渠電容之介電層的製作方法
巫勇賢, 李政哲
R.O.C. patent 183839, Aug. 1, 2003
  6 介電層的製作方法
巫勇賢, 李政哲
R.O.C. patent 193543, Dec. 11, 2003
  7 防止阻障層被過度蝕刻的方法及半導體結構.以及應用上述方法形成接觸窗的方法
巫勇賢, 顧家麟, 蕭世崇, 林炳宏
R.O.C. patent 197740, Feb. 11, 2004
  8 形成不同厚度氮化層之方法
巫勇賢
R.O.C. patent 200436, Apr. 11, 2004.
  9 Improve Memory Cell Capacitance by N2O Treatment of NO Stack Dielectric
Yung-Hsien Wu, Cheng-Che Lee
Germany patent 10250369, Apr. 29, 2004
  10 Method for Forming an Oxynitride Layer
Alex Ku, Yung-Hsien Wu
U.S.A. patent 6764962, Jul. 20, 2004
  11 Capacitor Dielectric Structure of A DRAM Cell and Method for Forming Thereof
Yung-Hsien Wu, Cheng-Che Lee
U.S.A. patent 6835630, Dec. 18, 2004
  12 移除深溝渠結構中半球形晶粒矽層之方法
巫勇賢
R.O.C. patent 227541, Feb. 1, 2005
  13 Method for Removal of Hemispherical Grained Silicon in a Deep Trench
Yung-Hsien Wu
U.S.A. patent 6872621, Mar. 29, 2005
  14 Dual Gate Nitride Process
Yung-Hsien Wu
U.S.A. patent 6872664, Mar. 29, 2005
  15 選擇性去除半球狀矽晶粒層的方法及深溝渠電容器之製法
巫勇賢
R.O.C. patent I236053, Jul. 11, 2005
  16 動態隨機存取記憶體及其製造方法
巫勇賢
R.O.C. patent I238495, Aug. 21, 2005
  17 Integration of SiC into DRAM Cell to Improve Retention Characteristics
巫勇賢
U.S.A. patent 7015091, Mar. 21, 2006
  18 Capacitor Dielectric Structure of a DRAM Cell and Method for Forming Thereof
Yung-Hsien Wu, Cheng-Che Lee
U.S.A. patent 7030441, Apr. 18, 2006
  19 介電層介電層結構及其製造方法
巫勇賢, 莊慧伶
R.O.C. patent I254448, May 1, 2006
20 Process for Selective Emitter Solar Cell
Yung-Hsien Wu, Li-karn Wang and Feng-Der Chin
U. S. patent pending, 2010
21 選擇性射極太陽電池的製程
巫勇賢, 王立康, 荊鳳德
Taiwan patent pending, 2010

　

　

　

　

　

　

　

　

　

　

　

　

　

　

　

　

　

　

　

　

　

　

　

　

　

　

　

　

　

　

　

　

　

　

　

　

　

　

　

　

                                                                                                                                                                                                                                                                                                                                                                                                                   

　

　

　

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