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| 1. |
C. C. Lee*, C. W. Wang, J.
Y. Syu, and W. C. Tsai, “Comprehensive Influences of
Manufacturing Process Integrated with Thermal
Cycling Test Loading on Mechanical Responses of
Power Module,” Accepted to be published at
IEEE Transactions on Components, Packaging, and
Manufacturing Technology, 2024. (SCI
Journal) |
| 2. |
C. C. Lee*, and H. Z. Lin,
“Modeling the Cure Shrinkage–Induced Warpage of
Epoxy Molding Compound,”
International Journal of Mechanical Sciences,
Vol. 268, Article 109056, Apr. 2024. (SCI Journal,
Impact Factor =7.3, Ranking 5/137, Mechanics)
(Top 5%
ranking) |
| 3. |
S. K. Siddique, H. Sadek, T. L. Lee, G. M. Manesi,
A. Avgeropoulos, C. W. Wang, C. C. Lee,
E. L. Thomas, and R. M. Ho*, “Topological Effect on
Mechanical Properties of Self-Assembled Block
Copolymer,”
Giant, Vol. 17, Article 100205, Mar. 2024. (SCI
Journal) |
| 4. |
C. C. Lee*, R. C. Shih, and
Y. H. Lin, “Development and Verification of
Interfacial Fracture Energy Simulation Methodology
for Porous Stacked Thin Films,”
Engineering Fracture Mechanics, Vol. 296,
Article 109851, Feb. 2024.
(SCI Journal,
Impact Factor =5.4, Ranking
14/137, Mechanics)
(Top 10%
ranking) |
| 5. |
C. C. Lee*, C. P. Chang, and
P. C. Huang, “Development and Demonstration on
Process-oriented Warpage Simulation Methodology of
Fan-out Panel-level Package in Multilevel
Integration,”
IEEE Transactions on Components, Packaging, and
Manufacturing Technology, Vol. 13, No. 12, pp.
2016-2023, Dec. 2023. (SCI
Journal) |
| 6. |
H. Sadek, S. K. Siddique, C. W. Wang, P. T. Chiu,
C. C. Lee, and R. M. Ho*,
“Starfish-Inspired Diamond-Structured Calcite Single
Crystal from Bottom-Up Approach as Mechanical
Metamaterials,”
ACS Nano, Vol. 17, No. 16, pp. 15678-15686,
Aug. 2023. (SCI Journal,
Impact Factor =18.027)
(Selected as
the Front Cover of Journal) |
| 7. |
Y. F. Lai, M. Y. Chang, Y. Y. Liou, C. C.
Lee, and H. Y. Hsueh*, “Morphological
Diagram of Dynamic-Interfacial-Release-Induced
Surface Instability,”
ACS Applied Materials & Interfaces, Vol.
15, No. 32, pp. 38975-38985, Aug. 2023.
(SCI Journal, Impact
Factor =9.5)
(Selected as
the Front Cover of Journal) |
| 8. |
S. H. Wang, W. Hsu*, Y. Y. Liou, P. C. Huang, and
C. C. Lee*, “Layout
Dependence Stress Investigation in Through Glass Via
Interposer Architecture Using a Submodeling
Simulation Technique and a Factorial Design
Approach,”
Micromachines, Vol. 14, No. 8, 1506 (page 15),
Aug. 2023. (SCI
Journal) |
| 9. |
S. K. Siddique, H. Sadek, C. W. Wang, C.
C. Lee, C. Y. Tsai, S. Y. Chang, C. L.
Li, C. H. Hsueh, and R. M. Ho*, “Diamond-Structured
Nanonetwork Gold as Mechanical Metamaterials from
Bottom-Up Approach,”
NPG Asia Materials, Vol. 15, Article number:
36, Jun. 2023. (SCI
Journal,
Impact Factor =10.761) |
| 10. |
C. C. Lee*, T. P. Hsiang, W.
H. Chang, and M. T. Lee, “Microscopic Mechanical
Simulation and Experimental Demonstration of
Deformed-Induced Failure for Li-ion Battery Package
in Electric Vehicle,”
Mechanics of Advanced Materials and Structures,
Vol. 30, No. 11, pp. 2341-2352, Jun. 2023. (SCI
Journal) |
| 11. |
C. C. Lee*, C. P. Chang, C.
Y. Chen, H. C. Lee, and G. C. F. Chen, “Warpage
Estimation and Demonstration of Panel-level Fan-out
Packaging with Cu Pillars Applied on a Highly
Integrated Architecture,”
IEEE Transactions on Components, Packaging, and
Manufacturing Technology, Vol. 13, No. 4, pp.
560-569, Apr. 2023. (SCI
Journal) |
| 12. |
E. R.Arriola, A. T. Ubando*, J. A. Gonzaga, and
C. C. Lee, “Wafer-Level
Chip-Scale Package Lead-Free Solder Fatigue: A
Critical Review,”
Engineering Failure Analysis, Vol. 144, Article
106986, Feb. 2023. (SCI
Journal) |
| 13. |
C. C. Lee*,
P. C. Huang, and T. P. Hsiang, “Interactive Lattice
and Process-Stress Responses in the Sub-7 nm
Germanium-based Three-Dimensional Transistor
Architecture of FinFET and Nanowire GAAFET,”
IEEE Transactions on Electron Devices, Vol. 69,
No. 12, pp. 6552-6560,
Dec. 2022. (SCI
Journal) |
| 14. |
H. Sadek, S. K. Siddique, C. W. Wang, C.
C. Lee, S. Y.
Chang, and R. M. Ho*, “Bioinspired Nanonetwork
Hydroxyapatite from Block Copolymer Templated
Synthesis for Mechanical Metamaterials,”
ACS Nano, Vol. 16, No. 11, pp. 18298-18306,
Nov. 2022. (SCI Journal,
Impact Factor =18.027) |
| 15. |
S. F. Tseng*, I H. Wang, C. M. Chang, C.
C. Lee*, D. Y. Yeh, T. W. Chen, and A. C.
Yeh, “Mechanical Characteristic Comparison of
Additively Manufactured Ti-6Al-4V Lattice Structures
in Biocompatible Bone Tissue Growth,”
Materials Science and Engineering A, Vol. 857,
Article 144045, Nov. 2022. (SCI
Journal) |
| 16. |
S. H. Wang, W. Hsu*, Y. Y. Liou, P. C. Huang, and
C. C. Lee*, “Reliability
Assessment of Thermocompressed Epoxy Molding
Compound Through Glass Via Interposer Architecture
by the Submodeling Simulation Approach,”
Materials, Vol. 15, No. 20, Article 7357, Oct.
2022. (SCI
Journal) |
| 17. |
C. C. Lee*, C. W. Wang, and
C. Y. Chen, “Comparison of Mechanical Modeling to
Warpage Estimation of RDL-First Fan-Out Panel-Level
Packaging,”
IEEE Transactions on Components, Packaging, and
Manufacturing Technology, Vol. 12, No. 7, pp.
1100-1108, Jul. 2022. (SCI
Journal) |
| 18. |
Chang-Chun Lee*, Chia-Chi
Lee, and C. P. Chang, “Simulation Methodology
Development of Warpage Estimation for Epoxy Molding
Compound under Considerations of Stress Relaxation
Characteristics and Curing Conditions Applied in
Semiconductor Packaging,”
Materials Science in Semiconductor Processing,
Vol. 145, Article 106637, Jul. 2022. (SCI
Journal) |
| 19. |
C. C. Lee*, K. S. Kao, C. W.
Wang, T. J. Yu, T. K. Lee, and P. K. Chiu, “Assembly
Reliability and Molding Material Comparison of
Miniature Integrated High Power Module with
Insulated Metal Substrate,”
Journal of Electronic Packaging, Vol. 144, No.
2, pp. 021001-1, Jun. 2022. (SCI
Journal) |
| 20. |
C. C. Lee*, K. S. Kao, H. C.
Liu, C. P. Hsieh, and T. C. Chang, “Micro Solder
Joint Reliability and Warpage Investigations of
Extremely Thin Double-Layered Stacked-Chip
Packaging,”
Journal of Electronic Packaging, Vol. 144, No.
1, pp. 011001-1, Mar. 2022. (SCI
Journal) |
| 21. |
C. C. Lee*, Y. Y. Liou, C.
P. Chang, P. C. Huang, C. Y. Huang, K. C. Chen, and
Y. J. Lin, “Estimated Approach Development and
Experimental Validation of Residual Stress-Induced
Warpage Under the SiNx PECVD Coating Process,”
Surface and Coatings Technology, Vol. 434,
Article 128225, Mar. 2022. (SCI
Journal) |
| 22. |
P. C. Huang, Y. M. Lin, H. N. Liu, and C.
C. Lee*, “Process-Induced Warpage and
Stress Estimation of Through Glass Via Embedded
Interposer Carrier with Ring-Type Framework,”
Microelectronics Reliability, Vol. 129, Article
114476, Feb. 2022. (SCI
Journal) |
| 23. |
P. C. Huang, and C. C. Lee*,
“Stress Impact of the Annealing Procedure of
Cu-Filled TSV Packaging on the Performance of
Nano-Scaled MOSFETs Evaluated by an Analytical
Solution and FEA-Based Submodeling Technique,”
Materials, Vol. 14, No. 18, 5226 (page 16),
Sep. 2021. (SCI
Journal) |
| 24. |
N. Anand, K. C. Chang, P. C. Huang, A. C. Yeh, C. W.
Tsai, C. C. Lee, M. T. Lee*,
and Y. B. Chen*, “An Effective and Efficient Model
for Temperature and Molding Appearance Analyses for
Selective Laser Melting Process,”
Journal of Materials Processing Technology,
Vol. 294, Article 117109, Aug. 2021. (SCI
Journal) |
| 25. |
C. C. Lee*, Y. M. Lin, H. C.
Liu, J. Y. Syu, Y. C. Huang, and T. C. Chang,
“Reliability Evaluation of Ultra Thin 3D-IC Package
Under the Coupling Load Effects of the Manufacturing
Process and Temperature Cycling Test,”
Microelectronic Engineering, Vol. 244-246,
Article 11572, May 2021. (SCI
Journal) |
| 26. |
S. K. Siddique, T. C. Lin, C. Y. Chang, Y. H. Chang,
C. C. Lee*, S. Y. Chang, P.
C. Tsai, Y. R. Jeng, E. L. Thomas, and R. M. Ho*,
“Nanonetwork Thermosets from Templated
Polymerization for Enhanced Energy Dissipation,”
Nano Letters, Vol. 21, No. 8, pp. 3355-3363,
Apr. 2021. (SCI Journal,
Impact Factor =11.238) |
| 27. |
T. H. Hsu, P. C. Huang, M. Y. Lee, K. C. Chang,
C. C. Lee*, M. Y. Li, C. P.
Chen, K. K. Jen, and A. C. Yeh*, “Effect of Processing
Parameters on The Fractions of Martensite in 17-4PH
Stainless Steel Fabricated by Selective Laser
Melting,”
Journal of Alloys and Compounds, Vol. 859,
Article 157758, Apr. 2021. (SCI
Journal) |
| 28. |
C. C. Lee*,
C. P. Hsieh, P. C. Huang, and M. H. Liao*,
“Performance Characteristics of Strained Ge
p-FinFETs Under the Integration of Lattice and
Self-heating Stress Enabled by Process-Oriented
Finite Element Simulation,”
Applied Physics Express, Vol. 14, No. 3,
Article 035504, Feb. 2021. (SCI
Journal) |
| 29. |
C. C. Lee*, and J. Y. He,
“Interactive Field Effect of Atomic Bonding Forces
on the Equivalent Elastic Modulus Estimation of
Micro-Level Single-Crystal Copper by Utilizing
Atomistic-Continuum Finite Element Simulation,”
Molecules, Vol. 25, No. 21, 5107 (page 10),
Nov. 2020. (SCI
Journal) |
| 30. |
C. C. Lee*, K. S. Kuo, C. W.
Wang, J. Y. Chang, W. K. Han, and T. C. Chang,
“Packaging Reliability Estimation of High-Power
Device Modules by Utilizing Silver Sintering
Technology,”
Microelectronics Reliability, Vol. 114, Article
113890, Nov. 2020. (SCI
Journal) |
| 31. |
C. J. Chen*, Y. M. Lin, T. H. Ni, T. C. Chang, H. T.
Hung, C. H. Tsai, C. Robert Kao, and C.
C. Lee, “Low Temperature SLID Bonding
Approach in Fine Pitch Chip-stacking Structure with
30 μm-pitch Interconnections,”
Transactions of The Japan Institute of Electronics
Packaging, Vol. 13, Pages E20-010-1-E20-010-4,
Oct. 2020. (SCI
Journal) |
| 32. |
C. C. Lee*, Y. F. Lin, Y. Y.
Liou, P. C. Huang, C. C. Liang, S. T. Yeh, and H. Y.
Chen, “Simulated and Experimental Demonstrations of
Interfacial Adhesive Strength for Released Layer
Utilized in Flexible Electronics,”
Thin Solid Films, Vol. 706, Article 138022,
Jul. 2020. (SCI
Journal) |
| 33. |
C. C. Lee*, P. C. Huang, Y.
C. Lin, and B. T. Chian, “Demonstration of an
Equivalent Material Approach for the Strain-Induced
Reliability Estimation of Stacked-Chip Packaging,”
IEEE Transactions on Device and Materials
Reliability, Vol. 20, No. 2, pp. 475-482, Jun.
2020. (SCI
Journal) |
| 34. |
C. C. Lee*, P. C. Huang, and
Y. C. Lin, “Analytical Model Developed for Precise
Stress Estimation of Device Channel within Advanced
Planar MOSFET Architectures,”
IEEE Transactions on Electron Devices,
Vol. 67, No. 4, pp. 1498-1505, Apr. 2020. (SCI
Journal) |
| 35. |
C. C. Lee*, R. C. Shih, P.
C. Huang, and S. F. Tseng*, “Adhesion Enhancement of
Conductive Graphene/PI substrates Through a Vacuum
Plasma System,”
Surface and Coatings Technology, Vol. 388,
Article 125601, Apr. 2020. (SCI
Journal) |
| 36. |
C. C. Lee*, and C. W. Wang,
“Interfacial Fracture Investigation of Patterned
Active Matrix OLED Driven by Amorphous-Si TFTs under
Film-Type Packaging Technology,”
Applied Surface Science, Vol. 510, Article
145428, Apr. 2020. (SCI
Journal) |
| 37. |
C. C. Lee*, and P. C. Huang,
“Comprehensive Stress Effect of Thin Coatings and
Silicon-Carbon Lattice Mismatch on Nano-scaled
Transistors with Protruding Poly Gate,”
Journal of Nanoscience and Nanotechnology,
Vol. 20, No. 2, pp. 760-768, Feb. 2020. (SCI
Journal) |
| 38. |
C. C. Lee*, J. C. Chuang, R.
C. Shih, and C. W. Wang, “Development of Real-Time
Measurement Platform for Stretchable and Rollable
Functions of Flexible Electronics under Multiple
Dynamic Loads,”
Micromachines, Vol. 11, No. 1, 106 (page 12),
Jan. 2020. (SCI
Journal) |
| 39. |
C. C. Lee*,
and P. C. Huang, “Overview of Computational Modeling
in Nano/Micro Scaled Thin Films Mechanical
Properties and Its Applications,”
Computer Modeling in Engineering & Sciences,
Vol. 120, No. 2, pp. 239-260, 2019. (SCI
Journal) |
| 40. |
Y. F. Lin*, J. C. Ho, K. Y. Lin*, K. L. Tung, T. W.
Chung, and C. C. Lee, “A
Drying-Free and One-Step Process for the Preparation
of Siloxane/CS Mixed-Matrix Membranes with
Outstanding Ethanol Dehydration Performances,”
Separation and Purification Technology, Vol.
221, pp. 325-330, Aug. 2019. (SCI
Journal) |
| 41. |
C. C. Lee*, P. C. Huang, J.
Y. He, and J. C. Chuang, “Laminated Process Effect
of High-Density Redistributed Trace Lines on the
Risk Estimation of Induced-Stress Failure for 3D-IC
Embedded Interposer,”
Microsystem Technologies, Vol. 25, No. 5, pp.
2021-2028, May 2019. (SCI
Journal) |
| 42. |
C. C. Lee*, and Y. Y. Liou,
“Dependent Analyses of Multilayered
Material/Geometrical Characteristics on the
Mechanical Reliability of Flexible Display Devices,”
IEEE Transactions on Device and Materials
Reliability, Vol. 18, No. 4, pp. 639-642, Dec. 2018.
(SCI
Journal) |
| 43. |
C. C. Lee*, and P. C. Huang,
“Layout Study of Strained Ge-Based PMOSFETs
Integrated with S/D GeSn Alloy and CESL by Using
Process-Oriented Stress Simulations,”
IEEE Transactions on Electron Devices, Vol. 65,
No. 11, pp. 4975-4981, Nov. 2018.
(SCI
Journal) |
| 44. |
C. C. Lee*, and C. P. Hsieh,
“Succeeded Foundation Effect of Stretched Gate and
SiGe Array Diffusion Zones on Film-Type Strained
Silicon PMOSFETs,”
Journal of Mechanics, Vol. 34, No. 5, pp.
645-651, Oct. 2018. (SCI
Journal) |
| 45. |
C. C. Lee*, and P. C. Huang,
“Magnifying the Effective Intrinsic Stress of
Surface Coating on the Performance of Nano-scaled
Ge-based High-k/Metal Gate Device through
Superficial Layout Designs,”
Thin Solid Films, Vol. 660, pp. 725-729, Aug.
2018. (SCI
Journal) |
| 46. |
C. C. Lee*, and P. C. Huang,
“Mixed Mode Interfacial Crack Energy Estimation of
Glass Interposer and SiNx
Coatings by Using Fracture Mechanics Based Computer
Methods and Experimental Validations,”
Theoretical and Applied Fracture Mechanics,
Vol. 96, pp. 790-794, Aug. 2018. (SCI
Journal) |
| 47. |
C. C. Lee*, and P. C. Huang,
“Material Lattice Orientation Effect of Local Si1-xGex
Stressors on the Width Dependence of High-k Metal
Gate PMOSFETs,”
Current Applied Physics, Vol. 18, pp. S2-S7,
Aug. 2018. (SCI
Journal) |
| 48. |
Y. F. Lin*, Y. J. Lin, C. C. Lee,
K. Y. Lin*, T. W. Chung, and K. L. Tung, “Synthesis
of Mechanically Robust Epoxy Cross-Linked Silica
Aerogel Membranes for CO2
Capture,”
Journal of the Taiwan Institute of Chemical
Engineers, Vol. 87, pp. 117-122, Jun. 2018. (SCI
Journal) |
| 49. |
C. C. Lee*, and P. C. Huang,
“The Development of Estimated Methodology for
Interfacial Adhesion of Semiconductor Coatings
Having an Enormous Mismatch Extent,”
Applied Surface Science, Vol. 440, pp. 202-208,
May 2018. (SCI
Journal) |
| 50. |
C. C. Lee*, C. H. Liu*, D.
Y. Li, and C. P. Hsieh, “Effect of
Contact-Etch-Stop-Layer and Si1-xGex
Channel Mechanical Properties on Nano-Scaled Short
Channel NMOSFETs with Dummy Gate Arrays,”
Microelectronics Reliability, Vol. 83, pp.
230-234, Apr. 2018. (SCI Journal) |
| 51. |
C. C. Lee*, P. C. Huang, and
J. Y. He “Layout Designs of Surface Barrier Coatings
for Boosting the Capability of Oxygen/Vapor
Obstruction Utilized in Flexible Electronics,”
Applied Surface Science, Vol. 436, pp. 183-188,
Apr. 2018. (SCI
Journal) |
| 52. |
H. W. Hsu, and C. C. Lee*,
“Effect of Strained Ge-Based NMOSFETs with Ge0.93Si0.07
Stressors on Device Layout,”
Solid-State Electronics, Vol. 138, pp. 113-118,
Dec. 2017. (SCI Journal) |
| 53. |
C. C. Lee*, Y. T. Kuo, and
C. H. Liu*, “Interaction Influence of S/D GeSi
Lattice Mismatch and Stress Gradient of CESL on
Nano-Scaled Strained NMOSFETs,”
Materials Science in Semiconductor Processing,
Vol. 70, pp. 254-259, Nov. 2017. (SCI Journal) |
| 54. |
C. C. Lee* and P. C. Huang,
“Comprehensive Effects of Strained Ge1-xSnx and
Device Layout Arrangement on a Nano-scale Ge-based
PMOSFET with a Short Channel,”
Materials Science in Semiconductor Processing,
Vol. 70, pp. 145-150, Nov. 2017. (SCI Journal) |
| 55. |
C. C. Lee*, “Effect of Wafer
Level Underfill on the Microbump Reliability of
Ultrathin-Chip Stacking Type 3D-IC Assembly during
Thermal Cycling Tests,”
Materials, Vol. 10, No. 10, pp. 1220, Oct.
2017. (SCI Journal) |
| 56. |
M. H. Liao*, H. Y. Huang, F. A. Tsai, C. C. Chuang, M.
H. Hsu, C. C. Lee, M. H.
Lee, C. Lien, C. F. Hsieh, T. C. Wu, H. S. Wu, and
C. W. Yao, “The Achievement of the Super Short
Channel Control in the Magnetic Ge n-FinFETs with
the Negative Capacitance Effect,”
Vacuum, Vol. 140, pp. 63-65, Jun. 2017. (SCI Journal) |
| 57. |
C. C. Lee*, H. W. Hsu, and M. H.
Liao*, “The Effect of CESL and Dummy Poly Gate for
n-Type MOSFETs with Short Si0.75Ge0.25
Channel,”
Vacuum, Vol. 140, pp. 66-70, Jun. 2017.
(SCI Journal) |
| 58. |
M. H. Liao*, C. P. Hsieh, and C. C. Lee*,
“The Investigation of Self-Heating Effect on Si1-xGex
FinFETs with Different Device Structures, Ge
Concentration, and Operated Voltages,”
AIP Advances, Vol. 7, No. 5, pp. 055105, May
2017. (SCI Journal) |
| 59. |
C. K. Yang, T. C. Cheng*, C. H. Cheng*, C. C. Wang,
and C. C. Lee, “Open-Loop
Altitude-Azimuth Concentrated Solar Tracking System
for Solar-Thermal Applications,”
Solar Energy, Vol. 147, pp. 52-60, May 2017. (SCI Journal) |
| 60. |
M. H. Liao*, C. P. Hsieh, and C. C. Lee*,
“The Systematic Investigation of Self-Heating Effect
on CMOS Logic Transistors From 20 nm to 5 nm
Technology Nodes by Experimental Thermo-Electric
Measurements and Finite Element Modeling,”
IEEE Transactions on Electron Devices, Vol. 64,
No. 2, pp. 646-648, Feb. 2017. (SCI Journal) |
| 61. |
C. C. Lee*, W. C. Wang, P. C.
Huang, Y. Y. Liou, and H. N. Liu, “Improvements of
Stress Migration in Nano-Scaled Copper
Interconnects,”
Science of Advanced Materials, Vol. 9, No. 1,
pp. 11-16, Jan. 2017. (SCI Journal) |
| 62. |
C. C. Lee*, and P. C. Huang,
“Stress-induced Failure Predictions of Flexible
Electronics with Nano-Scaled Thin-Films,”
Science of Advanced Materials, Vol. 9, No. 1,
pp. 6-10, Jan. 2017. (SCI Journal) |
| 63. |
B. J. Wen, C. C. Lee*, M. W.
Chang, H. K. Lin, Y. Y. Liou, and S. W. Cheng,
“Surface Properties of Nano-film Type Patterning
Electrode on Flexible Substrate for Bending Test,”
Science of Advanced Materials, Vol. 9, No. 1,
pp. 17-21, Jan. 2017. (SCI Journal) |
| 64. |
C. P. Hsieh, M. H. Liao*, C. C. Lee*,
T. C. Cheng, C. P. Wang, P. C. Huang, and S. W.
Cheng “Shallow Trench Isolation Geometric Influence
of a Recessed Surface on Array-type Arrangements of
Nano-scaled Devices Strained by Contact Etch Stop
Liner and Ge-based Stressors,”
Thin Solid Films, Vol. 618, Part A, pp.
172-177, Nov. 2016.
(SCI Journal) |
| 65. |
C. C. Lee*, P. C. Huang, and
K. S. Wang, “Flexural Capability of Patterned
Transparent Conductive Substrate by Performing
Electrical Measurements and Stress Simulations,”
Materials, Vol. 9, No. 10, pp. 850, Oct. 2016.
(SCI Journal) |
| 66. |
C. C. Lee*, C. C. Tsai, J. C.
Chuang, P. C. Huang, S. W. Cheng, and Y. Y. Liou,
“Adhesion Investigation of Stacked Coatings in
Organic Light-Emitting Diode Display Architecture,”
Surface and Coatings Technology, Vol. 303, pp.
226-231, Oct. 2016.
(SCI Journal) |
| 67. |
C. C. Lee*,
S. W. Cheng, C. P. Hsieh, M. H. Liao, and Y. H. Guo,
“Comprehensive Investigation on Array-Type Dummy
Active Diffused Region and Gate Geometries Using
Narrow NMOSFETs with SiC S/D Stressors,”
International Journal of Nanotechnology, Vol.
13, No. 7, pp. 492-508, 2016. (SCI Journal) |
| 68. |
J. S. Hsu, C. C. Lee*, B. J. Wen, P.
C. Huang, and C. K. Xie, “Experimental and Simulated
Investigations of Thin Polymer Substrates with an
Indium Tin Oxide Coating under Fatigue Bending
Loadings,”
Materials, Vol. 9, No. 9, pp. 720, Aug. 2016.
(SCI Journal) |
| 69. |
C. C. Lee,
R. C. Cheng, Y. M. Lin, H. N. Liu, Y. Y. Liou, T. C.
Chang, C. P. Wang*, “Flatness Enhancement of the
Embedded Interposer of 3D-ICs by Using Ring-Type
Framework Designs,”
Microelectronic Engineering, Vol. 156, pp.
30-36, Apr. 2016. (SCI Journal) |
| 70. |
C. C. Lee, Y. M. Lin, C. P.
Hsieh, Y. Y. Liou, C. J. Zhan, T. C. Chang, C. P.
Wang*, “Assembly Technology Development and Failure
Analysis for Three-Dimensional Integrated Circuit
Integration with Ultra-Thin Chips Stacking,”
Microelectronic Engineering, Vol. 156, pp.
24-29, Apr. 2016. (SCI Journal) |
| 71. |
M. H. Liao*, C. H. Yeh, C. C. Lee,
and C. P. Wang, “The Investigation of the Diameter
Dimension Effect on the Si Nano-Tube Transistors,”
AIP Advances, Vol. 6, No. 3, pp. 035021, Mar.
2016. (SCI Journal) |
| 72. |
C. C. Lee*, C. P. Hsieh, P.
C. Huang, S. W. Cheng, and M. H. Liao, “Ge1-xSix
on Ge-Based N-Type Metal-Oxide Semiconductor
Field-Effect Transistors by Device Simulation
Combined with High-Order Stress–Piezoresistive
Relationships,”
Thin Solid Films,
Vol. 602, pp. 78-83, Mar. 2016. (SCI Journal) |
| 73. |
T. C. Chang, C. C. Lee*, C.
P. Hsieh, S. C. Hung, and R. S. Cheng, “Electrical
Characteristics and Reliability Performance of IGBT
Power Device Packaging by Chip Embedding
Technology,”
Microelectronics Reliability, Vol. 55, No. 12,
pp. 2582-2588, Dec. 2015. (SCI Journal) |
| 74. |
C. C. Lee*, S. T. Chang, S.
W. Cheng, and B. T. Chian, “Performance
Investigation of Nanoscale Strained Ge pMOSFETs with
a GeSn Alloy Stressor,” Journal of Nanoscience and
Nanotechnology, Vol. 15, No. 11, pp. 9158-9162,
Nov. 2015. (SCI Journal) |
| 75. |
C. C. Lee*, and C. C. Huang,
“Induced Thermo-Mechanical Reliability of
Copper-Filled TSV Interposer by Transient Selective
Annealing Technology,”
Microelectronics Reliability, Vol. 55, No. 11,
pp. 2213-2219, Nov. 2015. (SCI Journal) |
| 76. |
C. C. Lee*, Y. L. Shen, and
Y. Kang, “Prediction of Interfacial Adhesion
Strength of Nanoscale Al/TiN Films Passed Through
Patterned BEOL Interconnects,”
Materials Science in Semiconductor Processing,
Vol. 39, pp. 1-5, Nov. 2015. (SCI Journal) |
| 77. |
B. J. Wen, C. C. Lee*, J. S.
Hsu, P. C. Huang, and C. H. Tsai, “Investigation of
Optical and Flexible Characteristics for
Organic-Based Cholesteric Liquid Crystal Display by
Utilizing Bending and Torsion Loadings,”
IEEE/OSA Journal of Display Technology, Vol.
11, No. 9, pp. 682-688, Sep. 2015.
(SCI Journal) |
| 78. |
J. Y. Chang, S. Y. Huang, C. C. Lee,
T. H. Chuang, and T. C. Chang*, “Influence of Glass
Transition Temperature of Underfill on the Stress
Behavior and Reliability of Microjoints Within a
Chip Stacking Architecture,” Journal of Electronic Packaging, Vol. 137, No. 3, pp. 031007,
Sep. 2015. (SCI Journal) |
| 79. |
C. C. Lee*, T. L. Tzeng, and
P. C. Huang, “Development of Equivalent Material
Properties of Microbump for Simulating Chip Stacking
Packaging,” Materials,
Vol. 8, No. 8, pp. 5121-5137, Aug. 2015. (SCI Journal) |
| 80. |
C. C. Lee*, Y. M. Lin, Y. H.
Guo, C. J. Zhan, T. C. Chang, and Y. H. Dzeng,
“Assembly Reliability Improvement of 3D-ICs
Packaging Using Pre-Stuffed Molding Material,”
Vacuum, Vol. 118, pp. 152-160, Aug. 2015. (SCI Journal) |
| 81. |
C. C. Lee*, P. J. Wei, B. T.
Chian, C. H. Tsai, and Y. H. Dzeng, “Predictions and
Measurements of Interfacial Adhesion among
Encapsulated Thin Films of Flexible Devices,” Thin Solid Films,
Vol. 584, pp. 154-160, Jun. 2015. (SCI Journal) |
| 82. |
C. C. Lee*, C. H. Liu, H. C. Cheng, and R. H. Deng, “Structural Optimizations of Silicon Based NMOSFETs with a Sunken STI Pattern by Using a Robust Stress Simulation Methodology,” Journal of Nanoscience and Nanotechnology, Vol. 15, No.
3, pp. 2179-2184, Mar. 2015. (SCI Journal) |
| 83. |
C. C. Lee*, C. H. Liu, Z. H. Chen, and T. L. Tzeng, “A Resultant Stress Effect of
Contact Etching Stop Layer and Geometrical Designs of Poly Gate on NanoScaled nMOSFETs with a Si1-xGex Channel,” Journal of Nanoscience and Nanotechnology, Vol. 15, No.
3, pp. 2173-2178, Mar. 2015. (SCI Journal) |
| 84. |
C. C. Lee*, C. H. Liu, and H. H. Teng, “Simulation-Based
Sensitivity Estimation of the Geometric Effect of
Poly Gates on Nanoscale N-Type
Metal-Oxide-Semiconductor Field-Effect Transistors
with Silicon-Carbon Alloy,” Thin Solid Films, Vol. 570, pp. 336-342,
Nov. 2014. (SCI Journal) |
| 85. |
P. C. Chen, Y. F. Su, S. Y. Yang, C. C. Lee, and K. N. Chiang*, “Evaluation of Die Strength
by Using Finite Element Method with Experiment Validation,”
IEEE Transactions on Components, Packaging, and Manufacturing Technology, Vol.
4, No. 7, pp. 1152-1158, Jul. 2014. (SCI Journal) |
| 86. |
C. C. Lee, and P. T. Lin*, “Reliability-Based
Design Guidance of Three-Dimensional Integrated
Circuits Packaging Using Thermal Compression Bonding
and Dummy Cu/Ni/SnAg Microbumps,” Journal of Electronic Packaging, Vol. 136, No. 3, pp. 031006-1, May 2014. (SCI Journal) |
| 87. |
C. C. Lee*, K. S. Kao, Leon Lin, J. Y. Chang, F. J. Leu, Y. L. Lu, and T. C. Chang, “Investigation
of Pre-Bending Substrate Design in Packaging
Assembly of an IGBT Power Module,” Microelectronic Engineering, Vol. 120, pp. 106-113, May 2014. (SCI Journal) |
| 88. |
C. C. Lee*, K. S. Kao, R. C. Cheng, C. J. Zhan, and T. C. Chang, “Reliability Enhancements of Chip-on-Chip Package with Layout Designs of Microbumps,” Microelectronic Engineering, Vol. 120, pp. 138-145, May 2014. (SCI Journal) |
| 89. |
C. C. Lee*, C. H. Liu, H. W. Hsu, and M. H. Hung, “Effects of Extended Poly Gate on the Performance of Strained P-Type Metal-Oxide-Semiconductor Field-Effect Transistors with a Narrow Channel Width,” Thin Solid Films, Vol. 557, pp. 311-315, Apr. 2014. (SCI Journal) |
| 90. |
C. C. Lee, H. C. Cheng, H. W. Hsu, Z. H. Chen, H. H. Teng, and C. H. Liu*, “Mechanical Property Effects of Si1-xGex Channel and Stressed Contact Etching Stop Layer on Nano-Scaled N-type Metal-Oxide-Semiconductor Field Effect Transistors,” Thin Solid Films, Vol. 557, pp. 316-322, Apr. 2014. (SCI Journal) |
| 91. |
C. C. Lee, C. H. Liu, R. H. Deng, H. W. Hsu, and K. N. Chiang*, “Investigation of Consequent Process-Induced Stress for N-Type Metal Oxide Semiconductor Field Effect Transistor with a Sunken Shallow Trench Isolation Pattern,” Thin Solid Films, Vol. 557, pp. 323-328, Apr. 2014. (SCI Journal) |
| 92. |
C. C. Lee*, “Overview of Interfacial Fracture Energy Predictions for Stacked Thin Films Using a Four-Point Bending Framework,” Surface and Coatings Technology,
Vol. 237, pp. 333-340, Dec. 2013. (SCI Journal) |
| 93. |
H. W. Hsu, H. S. Huang, C. C. Lee, S. Y. Chen, H. H. Teng, M. R. Peng, M. C. Wang, and C. H. Liu*, “Comparison of NMOSFET and PMOSFET Devices that Combine CESL Stressor and SiGe Channel,” Journal of Nanoscience and Nanotechnology, Vol. 13, No. 12, pp. 8127-8132, Dec. 2013. (SCI Journal) |
| 94. |
C. C. Lee, Y. F. Su, C. S. Wu, and K. N. Chiang*, “Investigation of Interconnect Design on Interfacial Cracking Energy of Al/TiN Barriers under a Flexural Load,” Thin Solid Films, Vol. 544, pp. 530-536, Oct. 2013. (SCI Journal) |
| 95. |
C. C. Lee*, “Modeling and Validation of Mechanical Stress in Indium Tin Oxide Layer Integrated in Highly Flexible Stacked Thin Films,” Thin Solid Films, Vol. 544, pp. 443-447, Oct. 2013. (SCI Journal) |
| 96. |
H. W. Hsu, K. C. Lin, C. C. Lee, M. J. Twu, H. S. Huang, S. Y. Chen, M. R. Peng, H. H. Teng, and C. H. Liu*, “Phenomena of N-type Metal-Oxide-Semiconductor-Field-Effect-Transistors with Contact Etch Stop Layer Stressor for Different Channel Lengths,” Thin Solid Films, Vol. 544, pp. 120-124, Oct. 2013. (SCI Journal) |
| 97. |
T. Y. Hung, C. J. Huang, C. C. Lee, C. C. Wang, K. C. Lu, and K. N. Chiang*, “Investigation of Solder Crack Behavior and Fatigue Life of the Power Module on Different Thermal Cycling Period,” Microelectronic Engineering, Vol. 107, pp. 125-129, Jul. 2013. (SCI Journal) |
| 98. |
C. C. Lee*, T. F. Yang, C. S. Wu, K. S. Kao, R. C. Cheng, and T. H. Chen, “Reliability Estimation and Failure Mode Prediction for 3D Chip Stacking Package with the Application of Wafer-Level Underfill,” Microelectronic Engineering, Vol. 107, pp. 107-113, Jul. 2013. (SCI Journal) |
| 99. |
C. C. Lee*, T. F. Yang, C. S. Wu, K. S. Kao, C. W. Fang, C. J. Zhan, J. H. Lau, and T. H. Chen, “Impact of High Density TSVs on the Assembly of 3D ICs Packaging,” Microelectronic Engineering, Vol. 107, pp. 101-106, Jul. 2013. (SCI Journal) |
| 100. |
C. C. Lee*, “Patterned Film Effects on the Adhesion of Al/TiN Barrier using Fracture-Energy Based Finite Element Analysis,” Surface and Coatings Technology, Vol. 215, pp. 400-406, Jan. 2013. (SCI Journal) |
| 101. |
C. C. Lee*, T. F. Yang, K. S. Kao, R. C. Cheng, C. J. Zhan, and T. H. Chen, “Development of Cu/Ni/SnAg Microbump Bonding Processes for Thin-Chip-on-Chip Package via Wafer-Level Underfill Film,” IEEE Transactions on Components, Packaging, and Manufacturing Technology, Vol. 2, No. 9, pp. 1412-1419, Sep. 2012. (SCI Journal) |
| 102. |
C. Y. Ho*, Y. J. Chang, C. C. Lee, W. Chang, H. W. Wang, and Y. Kang, “Ambipolar Conduction Behavior on High Performance Schottky Barrier Source/Drain Gate-all-around Si Nanowire Nonvolatile SONOS Memory,” ECS Journal of Solid State Science and Technology, Vol. 1, No. 5, pp. 241-245, Sep. 2012. (SCI Journal) |
| 103. |
C. C. Lee* and S. T. Chang, “Stress Impact of a Tensile CESL on Nanoscale Strained NMOSFETs Embedded with a Silicon-Carbon Alloy Stressor,” Journal of Nanoscience and Nanotechnology, Vol. 12, No. 7, pp. 5342-5346, Jul. 2012. (SCI Journal) |
| 104. |
C. C. Lee*, “Strain Engineering of Nanoscale Si PMOSFET Devices with SiGe Alloy Integrated with CESL Stressors,” Journal of Nanoscience and Nanotechnology, Vol. 12, No. 7, pp. 5402-5406, Jul. 2012. (SCI Journal) |
| 105. |
C. C. Lee*, S. T. Chang, and B. F. Hsieh, “Effect of Layout Arrangements on Strained NMOSFECTs with SiC Stressor,” Thin Solid Films, Vol. 520, No. 19, pp. 6282-6286, Jul. 2012. (SCI Journal, Impact Factor =1.935, Ranking 3/18, Materials Science, Coatings & Films) |
| 106. |
C. C. Lee and A. S. Oates*, “A New Stress Migration Failure Mode in Highly Scaled Cu/Low-k Interconnects,” IEEE Transactions on Device and Materials Reliability, Vol. 12, No. 2, pp. 529-531, Jun. 2012. (SCI Journal) |
| 107. |
C. C. Lee*, Y. S. Shih, C. S. Wu, C. H. Tsai, S. T. Yeh, Y. H. Peng, and K. J. Chen, “Development of Robust Flexible OLED Encapsulations Using Simulated Estimations and Experimental Validations,” Journal of Physics D: Applied Physics, Vol. 45, No. 27, pp. 275102, Jul. 2012. (SCI Journal)
(Selected as the Front Cover
of Journal) |
| 108. |
Y. F. Su, S. Y. Yang, T. Y. Hung, C. C. Lee, and K. N. Chiang*, “Light Degradation Test and Design of Thermal Performance for High-Power Light-Emitting Diodes,” Microelectronics Reliability, Vol. 52, No. 5, pp. 794-803, May 2012. (SCI Journal) |
| 109. |
M. H. Lee*, S. T. Chang, B. F. Hsieh, J. J. Huang, and C. C. Lee, “Analysis and Modeling of Nano-Crystalline Silicon TFTs on Flexible Substrate with Mechanical Strain,” Journal of Nanoscience and Nanotechnology, Vol. 11, No. 12, pp. 10485-10488, Dec. 2011. (SCI Journal) |
| 110. |
T. Y. Hung, S. Y. Chiang, C. J. Huang, C. C. Lee, and K. N. Chiang*, “Thermal-Mechanical Behavior of the Bonding Wire for a Power Module Subjected to the Power Cycling Test,” Microelectronics Reliability, Vol. 51, No. 9-11, pp. 1819-1823, Sep.-Nov. 2011. (SCI Journal) |
| 111. |
C. C. Lee, S. T. Chang*, P. H. Sun, and C. X. Huang, “Impact of Strain Engineering on Nanoscale Strained InGaAs MOSFET Devices,” Journal of Nanoscience and Nanotechnology, Vol. 11, No. 7, pp. 5623-5627, Jul. 2011. (SCI Journal) |
| 112. |
S. T. Chang*, C. C. Lee, and P. H. Sun, “Technology Computer-Aided Design Simulation Study for a Strained InGaAs Channel n-type Metal-Oxide-Semiconductor Field-Effect Transistor with a High-k Dielectric Oxide Layer and a Metal Gate Electrode,” Journal of Vacuum Science and Technology B, Vol. 29, No. 3, pp. 032203-1-5, Apr. 2011. (SCI Journal) |
| 113. |
S. T. Chang*, P. H. Sun, and C. C. Lee, “Impact of Strain Engineering on InGaAs NMOSFET with a InGaAs Alloy Stressor,” Thin Solid Films, Vol. 519, No. 5, pp. 1738-1742, Dec. 2010. (SCI Journal) |
| 114. |
Chang-Chun Lee*, Chien-Chen Lee, and Y. W. Yang, “Fracture Prediction of Dissimilar Thin Film Materials in Cu/low-k Packaging,” Journal of Materials Science: Materials in Electronics, Vol. 21, No. 8, pp. 787-795, Aug. 2010. (SCI Journal) |
| 115. |
C. C. Chiu, C. J. Huang, S. Y. Yang, C. C. Lee, and K. N. Chiang*, “Investigation of Delamination Mechanism of Cu/Low-k Stacking Structure in Flip Chip Packages,” Microelectronic Engineering, Vol. 87, No. 3, pp. 496-500, Mar. 2010. (SCI Journal) |
| 116. |
Chien-Chen Lee, Chang-Chun Lee, and K. N. Chiang*, “Electromigration Characteristic of SnAg3.0Cu0.5 Flip Chip Interconnection,” IEEE Transactions on Advanced Packaging, Vol. 33, No. 1, pp. 189-195, Feb. 2010. (SCI Journal) |
| 117. |
J. Huang, S. T. Chang*, W. C. Wang, and C. C. Lee, “Simulation of a Nanoscale Strained Si NMOSFET with a Silicon-Carbon Alloy Stressor,” Thin Solid Films, Vol. 518, No. 6, pp. S72-S75, Jan. 2010. (SCI Journal) |
| 118. |
J. Huang, S. T. Chang*, B. F. Hsieh, M. H. Liao, W. C. Wang, and C. C. Lee, “Strain Engineering of Nanoscale Si MOS Devices,” Thin Solid Films, Vol. 518, No. 6, pp. S241-S245, Jan. 2010. (SCI Journal) |
| 119. |
M. H. Lee*, S. T. Chang, C. C. Lee, J. J. Huang, G. R. Hu, and Y. S. Huang, “The Gap State Density of Micro/Nano-Crystalline Silicon Active Layer on Flexible Substrate,” Thin Solid Films, Vol. 518, No. 6, pp. S246-S249, Jan. 2010. (SCI Journal) |
| 120. |
S. T. Chang*, W. C. Wang, C. C. Lee, and J. Huang, “A TCAD Simulation Study of Impact of Strain Engineering on Nanoscale Strained Si NMOSFETs with a Silicon-Carbon Alloy Stressor,” Thin Solid Films, Vol. 518, No. 5, pp. 1595-1598, Dec. 2009. (SCI Journal) |
| 121. |
C. C. Lee*, J. Huang, S. T. Chang, and W. C. Wang, “Adhesion Investigation of low-k Films System Using 4-Point Bending Test,” Thin Solid Films, Vol. 517, No. 17, pp. 4875-4878, Jul. 2009. (SCI Journal) |
| 122. |
S. T. Chang*, M. H. Liao, C. C. Lee, J. Huang, W. C. Wang, and B. F. Hsieh, “Carrier Backscattering Characteristics of Nanoscale Strained Complementary Metal-Oxide-Semiconductor Devices Featuring the Optimal Stress Engineering,” Journal of Vacuum Science and Technology B, Vol. 27, No. 3, pp. 1261-1266, May 2009. (SCI Journal) |
| 123. |
C. C. Lee, J. Huang, S. T. Chang*, and W. C. Wang, “Impact of Channel Width and Dummy Length on Performance Enhancement in p-Type Metal Oxide Semiconductor Field Effect Transistor with a Silicon-Germanium Alloy Stressor,” Journal of Vacuum Science and Technology B, Vol. 27, No. 3, pp. 1256-1260, May 2009. (SCI Journal) |
| 124. |
C. C. Lee, C. C. Chiu, C. C. Hsia, and K. N. Chiang*, “Interfacial Fracture Analysis of CMOS Cu/Low-k BEOL Interconnect in Advanced Packaging Structures,” IEEE Transactions on Advanced Packaging, Vol. 32, No. 1, pp. 53-61, Feb. 2009. (SCI Journal) |
| 125. |
C. C. Lee*, K. C. Chang, and Y. W. Yang, “Lead-Free Solder Joint Reliability Estimation of Flip Chip Package Using FEM-Based Sensitivity Analysis,” Soldering & Surface Mount Technology, Vol. 21, No. 1, pp. 31-41, Jan. 2009. (SCI Journal) |
| 126. |
Robin C. J. Wang, K. S. Chang-Liao*, T. K. Wang, M. N. Chang, C. S. Wang, J. H. Lin, C. C. Lee, C. C. Chiu, and Kenneth Wu, “Electrical Conduction and TDDB Reliability Characterization for Low-k SiCO Dielectric in Cu Interconnects,” Thin Solid Films, Vol. 517, No. 3, pp. 1230-1233, Dec. 2008. (SCI Journal) |
| 127. |
C. C. Lee, T. L. Chou, C. C. Chiu, C. C. Hsia, and K. N. Chiang*, “Cracking Energy Estimation of Ultra Low-k Package Using Novel Prediction Approach Combined with Global-Local Modeling Technique,” Microelectronic Engineering, Vol. 85, No. 10, pp. 2079-2084, Oct. 2008. (SCI Journal) |
| 128. |
C. C. Chiu, C. C. Lee, T. L. Chou, C. C. Hsia, and K. N. Chiang*, “Analysis of Cu/Low-K Structure under Back End of Line Process,” Microelectronic Engineering, Vol. 85, No. 10, pp. 2150-2154, Oct. 2008. (SCI Journal) |
| 129. |
C. C. Lee, T. C. Huang, C. C. Hsia, and K. N. Chiang*, “Interfacial Fracture Investigation of Low-k Packaging Using J-Integral Methodology,” IEEE Transactions on Advanced Packaging, Vol. 31, No. 1, pp. 91-99, Feb. 2008. (SCI Journal) |
| 130. |
Robin C. J. Wang, K. S. Chang-Liao*, T. K. Wang, C. C. Lee, J. H. Lin, A. S. Oates, S. C. Lee, and Kenneth Wu, “Resistance Characterization of Cu Stress-Induced Void Migration at Narrow Metal Finger Connected with Wide Lead,” Thin Solid Films, Vol. 516, No. 2-4, pp. 449-453, Dec. 2007. (SCI Journal) |
| 131. |
Robin C. J. Wang, K. S. Chang-Liao*, A. S. Oates, C. C. Lee, L. D. Chen, C. C. Chiu, and Kenneth Wu, “Copper Stress Migration at Narrow Metal Finger with Wide Lead,” Microelectronic Engineering, Vol. 84, No. 11, pp. 2697-2701, Nov. 2007. (SCI Journal) |
| 132. |
C. C. Chiu, H. H. Chang, C. C. Lee, C. C. Hsia, and K. N. Chiang*, “Reliability of Interfacial Adhesion in a Multi-Level Interconnect Structure,” Microelectronics Reliability, Vol. 47, No. 9-11, pp. 1506-1511, Sep.-Nov. 2007. (SCI Journal) |
| 133. |
C. C. Lee, H. C. Liu, and K. N. Chiang*, “3D Structure Design and Reliability Analysis of Wafer Level Package with Stress Buffer Mechanism,” IEEE Transactions on Component and Packaging Technologies, Vol. 30, No. 1, pp. 110-118, Mar. 2007. (SCI Journal) |
| 134. |
C. C. Lee, S. M. Chang, and K. N. Chiang*, “Sensitivity Design of DL-WLCSP Using DOE with Factorial Analysis Technology,” IEEE Transactions on Advanced Packaging, Vol. 30, No. 1, pp. 44-55, Feb. 2007. (SCI Journal) |
| 135. |
Chang-Chun Lee, Chien-Chen Lee, H. T. Ku, S. M. Chang, and K. N. Chiang*, “Solder Joints Layout Design and Reliability Enhancements of Wafer Level Packaging Using Response Surface Methodology,” Microelectronics Reliability, Vol. 47, No. 2-3, pp. 196-204, Feb.-Mar. 2007. (SCI Journal) |
| 136. |
C. M. Liu, C. C. Lee, and K. N. Chiang*, “Enhancing the Reliability of Wafer Level Packaging by Using Solder Joints Layout Design,” IEEE Transactions on Component and Packaging Technologies, Vol. 29, No. 4, pp. 877-885, Dec. 2006. (SCI Journal) |
| 137. |
Robin C. J. Wang*, C. C. Lee, L. D. Chen, Kenneth Wu, and K. S. Chang-Liao, “A Study of Cu/Low-k Stress-induced Voiding at Via Bottom and Its Microstructure Effect,” Microelectronics Reliability, Vol. 46, No. 9-11, pp. 1673-1678, Sep.-Nov., 2006. (SCI Journal) |
| 138. |
C. C. Lee, H. T. Ku, C. C. Chiu, and K. N. Chiang*, “A Novel Prediction Technique for Interfacial Crack Growth of Electronic Interconnect,” Key Engineering Materials, Vols. 326-328, pp. 533-536, 2006. (SCI Journal) |
| 139. |
C. M. Liu, C. C. Lee, H. T. Ku, C. C. Chiu, and K. N. Chiang*, “Interconnect Design and Thermal Stress/Strain Analysis of Flip Chip Packaging,” Key Engineering Materials, Vols. 326-328, pp. 521-524, 2006. (SCI Journal) |
| 140. |
C. C. Lee, and K. N. Chiang*, “Design and Reliability Analysis of a Novel Wafer Level Package with Stress Buffer Mechanism,” Journal of the Chinese Institute of Engineers, Vol. 29, No. 3, pp. 433-443, May 2006. (SCI Journal) |
| 141. |
K. N. Chiang*, Chien Chen Lee, Chang-Chun Lee, and K. M. Chen, “Current Crowding-induced Electromigration in SnAg3.0Cu0.5 Micro-bumps,” Applied Physics Letters, 88, 072102, 2006. (SCI Journal) |
| 142. |
C. C. Lee, C. T. Peng, and K. N. Chiang*, “Packaging Effect Investigation of CMOS Compatible Pressure Sensor Using Flip Chip and Flex Circuit Board Technologies,” Sensors and Actuators Journal A, Vol. 126, No. 1, pp. 48-55, Jan. 2006. (SCI Journal) |
| 143. |
C. C. Lee, K. N. Chiang*, W. K. Chen, and R. S. Chen, “Design and Analysis of Gasket Sealing of Cylinder Head under Engine Operation Conditions,” Finite Elements in Analysis and Design, Vol. 41, No. 11-12, pp. 1160-1174, Jun. 2005. (SCI Journal) |
|
| |
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|
1. |
Y. W. Huang, R. A. K. Yadav, H. Y. Lin, J. H. Li,
and C. C. Lee*, “Study of
Stress and Warpage Estimation on FOWLP under
Hygro-Thermal Coupling Loading Conditions,” Accepted
to be published at
The 74th IEEE
Electronic Components Technology Conference (ECTC
2024), Denver, Colorado, USA, May 28-31,
2024. |
2.
|
C. C. Lee*,
J. C. Chuang, C. T. Yang, C. I. Li, B. Lee, and S.
H. Kuo, “Simulation and Metrological Applications
for RDL Patterning Development of Glass Substrate,”
Accepted to be published at
The 74th IEEE
Electronic Components Technology Conference (ECTC
2024), Denver, Colorado, USA, May 28-31,
2024. |
| 3. |
C. C. Lee*, R. C. Shih, and
Y. H. Lin, “Establishment and Verification of Energy
Simulation Approach for Porous Film Interface
Fracture Caused by Packaging Load,”
Proceedings of the 47th
Conference on Theoretical and Applied Mechanics,
Yunlin, Taiwan, Nov. 17-18, 2023. |
| 4. |
C. C. Lee*, and J. H. Li,
“Chipping-Induced Fracture Investigation of Glass
Interposer with Dielectric Coatings,”
TACT2023 International Thin Films Conference,
Taipei, Taiwan, Nov. 12-15, 2023. |
| 5. |
C. C.
Lee*, J. C. Chuang, C. T. Yang, and C.
I Li, “Reduced-Order Models of Digital Twin
Applications for Design Platform of Flexible Hybrid
Electronics,”
The 73rd IEEE
Electronic Components Technology Conference (ECTC
2023), pp.1194-1199, Orlando, Florida, USA, May
30-Jun. 2, 2023. |
| 6. |
C. C. Lee*, C. W. Wang, C.
P. Chang, and J. C. Chuang, “Warpage Estimation of
Panel-Level Package from Panel to Strip by Using
Multi-Scaling Sub-modeling Technique,”
The 73rd IEEE
Electronic Components Technology Conference (ECTC
2023), pp.1969-1972, Orlando, Florida, USA, May
30-Jun. 2, 2023. |
| 7. |
Y. M. Lin*, T. Y. Ou Yang, O. H. Lee, C. K. Lee, W.
L. Chiu, T. C. Chang, H. H. Chang, M. Gallagher, C.
Gilmore, P. Y. Chuang, Y. C. Tseng, P. H. Tsai, P.
C. Huang, and C. C. Lee, “A
Novel Polymer-Based Ultra-High Density Bonding
Interconnection,” Accepted to be published at
The 73rd IEEE
Electronic Components Technology Conference (ECTC
2023), pp.1779-1784, Orlando, Florida, USA, May
30-Jun. 2, 2023. |
| 8. |
Y. H. Lin,
C. C. Lee*, C. Y. Liao, M. H.
Lin, W. C. Tu, R. Chen, H. P. Chen, W. S. Shue, and
M. Cao, “A Novel Methodology to Predict
Process-Induced Warpage in Advanced BEOL
Interconnects,”
IEEE International Reliability Physics Symposium
(IRPS), Monterey, California, USA, Mar.
26-30, 2023. |
| 9. |
C. W. Wang, C. P. Chang, and C. C. Lee*,
“Demonstration on Warpage Estimation Approach
Utilized in Fan-Out Panel-Level Packaging Enabled by
Multi-Scale Process-Oriented Simulation,”
IEEE International Reliability Physics Symposium
(IRPS), Monterey, California, USA, Mar.
26-30, 2023. |
| 10. |
C. C. Lee*, C. P. Chang, and
A. Lee, “Warpage Estimation and Verification of
Panel-Level Fan-Out Package-on-Package Structure,”
Proceedings of the 46th
Conference on Theoretical and Applied Mechanics,
Kaohsiung, Taiwan, Nov. 18-19, 2022. |
| 11. |
C. W. Wang, C. P.
Chang, G. Z. Lin, H. Z. Lin, C. C. Lee*,
“Multiscale Modeling of RDL-First FO-PLP Utilizing
the Process-Oriented Simulation for Warpage
Prediction,”
2022 International Microsystems Packaging Assembly
and Circuits Technology Conference (the 17th
IMPACT Conference), Taipei, Taiwan, Oct.
26-28, 2022. |
| 12. |
Y. M. Lin*, P. C.
Chang, W. L. Chiu, T. C. Chang, H. H. Chang, B.
Huang, C. H. Lee, M. Dong, D. Tsai, C. C.
Lee, and K. N. Chen, “A Hybrid Bonding
Interconnection with a Novel Low Temperature Bonding
Polymer System,”
The 72nd IEEE
Electronic Components Technology Conference (ECTC
2022), San Diego, CA, USA, May 31-Jun.
03, 2022. |
| 13. |
C. K. Lee, W. H.
Liu, S. Y. Chang, R. S. Cheng, Y. M. Lin*, H. E.
Ding, W. L. Chiu, T. C. Chang, C. H. Lee, and
C. C. Lee, “Characteristic
Analysis of a Multi-chip Embedded Interposer Carrier
Using a Wafer-Level Fan-Out Process,”
2022 International Conference on Electronics
Packaging (ICEP 2022), Sapporo, Japan,
May 11-14, 2022. |
| 14. |
C. W. Wang, C. Y.
Chen, and C. C. Lee*,
“Mechanical Modeling Approaches with on Fan-Out
Panel-Level Packaging for Warpage Estimation,”
The 16th
International Microsystems, Packaging, Assembly and
Circuits Technology Conference (IMPACT 2021),
Taipei, Taiwan, Dec. 21-23, 2021. |
| 15. |
C. W. Wang, J. Y.
Syu, and C. C. Lee*,
“Simulation and Verification of High-power Module
Under the Coupling Load Effects of Manufacturing
Process and Thermal Cycling Test,”
Proceedings of the 38th National Conference on
Mechanical Engineering (CSME), Tainan,
Taiwan, Dec. 02-03, 2021. |
| 16. |
C. H. Tsai, Y. C. Huang, C. W. Wang, and
C. C. Lee*, “Experimental and Simulated
Verifications of Power Cycling Reliability for the
Thin and Low Warpage Power Module,”
Proceedings of the 38th National Conference on
Mechanical Engineering (CSME), Tainan,
Taiwan, Dec. 02-03, 2021. |
| 17. |
J. Y. Syu, Y. C. Huang, and C. C. Lee*,
“Simulation and Verification of High-power Module
Under the Coupling Load Effects of Packaging Process
and Reliability Test,”
Proceedings of the 45th Conference on Theoretical
and Applied Mechanics, Taipei, Taiwan,
Nov. 18-19, 2021. |
| 18. |
C. C. Lee*, C. W. Wang, and C. C. Lee,
“Estimation Demonstration and Applicability
Investigation of Simulation Methodology on Warpage
Induced by Epoxy Molding Compound Process,”
Proceedings of the 45th Conference on Theoretical
and Applied Mechanics, Taipei, Taiwan,
Nov. 18-19, 2021. |
| 19. |
C. Y. Chen*, C. P. Chang, and C.
C. Lee, “Applicability
Investigation of Equivalent Material Simulation
Approach Utilized in Warpage Estimation of
Panel-Level Fan-Out Package,”
Proceedings of the 45th
Conference on Theoretical
and Applied Mechanics, Taipei, Taiwan,
Nov. 18-19, 2021. |
| 20. |
C. C. Lee*, Y. Y. Liou, C.
P. Chang, C. Y. Huang, and K. C. Chen, “Simulated
Methodology Development and Experimental
Demonstration of Residual Stress Induced Warpage for
SiNx PECVD Coating Process,”
TACT2021 International Thin Films Conference,
Taipei, Taiwan, Nov. 15-18, 2021. |
| 21. |
C. W. Wang, Y. C.
Huang, K. S. Kao, S. T. Wu, T. K. Lee, H. L. Wu, T.
H. Ni, C. H. Tseng, T. J. Yu, and C. C.
Lee*, “The Novel Power Module with
Insulated Metal Substrate for Power Cycling Finite
Element Analysis and Reliability Evaluation,”
ASME International Mechanical Engineering Congress
and Exposition (IMECE Virtual Conference),
Nov. 01-05, 2021. |
| 22. |
J. Y. Syu, C. W. Wang, K. S. Kao, S. T. Wu, T. K.
Lee, H. L. Wu, T. H. Ni, C. H. Tseng, T. J. Yu, and
C. C. Lee*, “Thermal Cycle
Reliability Analysis of Direct Bonding Copper Power
Module Considering the Manufacturing Process
Effect,”
ASME International Mechanical Engineering Congress
and Exposition (IMECE Virtual Conference),
Nov. 01-05, 2021. |
| 23. |
J. Y. Syu, C. W. Wang, K. S. Kao, S. T. Wu, T. K.
Lee, H. L. Wu, T. H. Ni, C. H. Tseng, T. J. Yu, and
C. C. Lee*, “Coupling Effect
of Manufacturing Process and Thermal Cycle Test on
High-Power Module,”
ASME International Technical Conference and
Exhibition on Packaging and Integration of
Electronic and Photonic Microsystems (InterPACK
Virtual Conference), Oct. 26-28, 2021. |
| 24. |
C. C.
Lee*, C. W. Wang, C. C. Lee, C. Y.
Chen, Y. H. Chen, H. C. Lee, and T. S. Chou,
“Warpage Estimation of Heterogeneous Panel-Level
Fan-Out Package with Fine Line RDL and Extreme Thin
Laminated Substrate Considering Molding
Characteristics,”
The 71st IEEE
Electronic Components Technology Conference (ECTC
2021 Virtual Conference), Jun. 01-Jul.
04, 2021. |
| 25. |
Y. M. Lin*, W. L. Chiu, C. J. Chen, H. E. Ding, O.
H. Lee, A. Y. Lin, R. S. Cheng, S. T. Wu, T. C.
Chang, H. H. Chang, W. C. Lo, C. H. Lee, J. See, B.
Huang, X. Liu, T. P. Hsiang, and C. C.
Lee, “A Novel Multi-Chip Stacking
Technology Development Using a Flip-Chip Embedded
Interposer Carrier Integrated in Fan-Out Wafer-Level
Packaging,”
The 71st IEEE
Electronic Components Technology Conference (ECTC
2021 Virtual Conference), Jun. 01-Jul.
04, 2021. |
| 26. |
Y. C. Lin, P. C.
Huang, and C. C. Lee*,
“Mechanical-Based Analytical Derivation and
Verification for the Performance Enhancement of
Strain-Induced Advanced Semiconductor Device,”
Proceedings of the 44th
Conference on Theoretical and Applied Mechanics,
Yilan, Taiwan, Nov. 26-27, 2020. |
| 27. |
L. H. Peng,
C. C. Lee*, and T. P. Hsiang,
“Measurement and Simulation Verification of Fracture
Toughness for Additive Manufacturing Specimens by
Using Selective Laser Melting Process,”
Proceedings of the 37th
National Conference on Mechanical Engineering (CSME),
Yunlin, Taiwan, Nov. 20-21, 2020. |
| 28. |
C. C.
Lee*, C. W. Wang, C. Y. Chen, and T. C.
Cheng, “Warpage Reinforcement Designs of Fan-Out
Heterogeneous Integrated Packaging,”
ASME International Mechanical Engineering Congress
and Exposition (IMECE Virtual Conference),
Nov. 16-19, 2020. |
| 29. |
C. C. Lee*, C. W. Wang, and
T. P. Hsiang, “Estimation of Suppressing Warpage for
Heterogeneous Integration of Packaging Framework by
Utilizing Equivalent Material Simulated Technique,”
ASME
International Mechanical Engineering Congress and
Exposition (IMECE Virtual Conference),
Nov. 16-19, 2020. |
| 30. |
K. S. Kao, S. T. Wu,
T. J. Yu, Y. T. Lin, H. H. Lin, H. L. Wu, J. Y. Syu,
T. C. Chang, and C. C. Lee*,
“Innovative High Density Power Module for E-Scooter
Motor Using a High Performance Insulated Metal
Substrate,”
ASME International Technical Conference and
Exhibition on Packaging and Integration of
Electronic and Photonic Microsystems (InterPACK
Virtual Conference), Oct. 27-29, 2020. |
| 31. |
C. C. Lee, R. C.
Shih, C. W. Wang, and C. C. Lee*,
“Effective Material Characteristics Extraction on
Redistribution Layer of Fan-Out Panel-Level
Packaging Architecture,”
The 15th
International Microsystems, Packaging, Assembly and
Circuits Technology Conference (IMPACT-EMAP 2020),
Taipei, Taiwan, Oct. 21-23, 2020. |
| 32. |
C. C.
Lee*, K. S. Kuo, C. W. Wang, J. Y.
Chang, W. K. Han, and T. C. Chang, “Packaging
Reliability Estimation of High-Power Device Modules
by Utilizing Silver Sintering Technology,”
The 31st
European Symposium on Reliability of Electron
Devices, Failure Physics and Analysis (ESREF 2020),
Athens, Greece, Oct. 04-08, 2020. |
| 33. |
C. Y. Peng, P. B.
Lin, C. T. Ko, C. W. Wang, Oscar Chuang, and
C. C. Lee*, “A Novel Warpage
Reinforcement Architecture with RDL Interposer for
Heterogeneous Integrated Packages,”
The 70th IEEE
Electronic Components Technology Conference (ECTC
2020 Virtual Conference), Jun. 03-30,
2020. |
| 34. |
C. C. Lee*, J. C. Chuang,
Steve Chiu, S. F. Cheng, C. T. Yang, W. Y. Cheng,
“Design and Validation of Reliability Physics for
Interconnect Architectures Induced from Inclusive
TM/SM/EM Effects,”
The 70th IEEE
Electronic Components Technology Conference (ECTC
2020 Virtual Conference), Jun. 03-30,
2020. |
| 35. |
C. C.
Lee*, and Y. C. Lin, “Material
Characteristics Effect of Underfill on Fine-Pitch
Chip Stacking Packaging Reliability,”
The 7th
Asian-Pacific Congress on Computational Mechanics
(APCOM 2019), Taipei, Taiwan, Dec.
17-20, 2019. |
| 36. |
C. C. Lee*, and R. C. Shih,
“Mechanical Characteristic Estimation of Nano-Scaled
Single-Crystal Copper Enabled by Atomistic-Continuum
Finite Element Simulation,”
The 7th
Asian-Pacific Congress on Computational Mechanics
(APCOM 2019), Taipei, Taiwan, Dec.
17-20, 2019. |
| 37. |
C. C.
Lee*, and P. C. Huang, “Effectiveness
of Embedded poly Si Wall on 7 nm FinFET Architecture
with Strain Relaxed Buffer Design,”
TACT2019 International Thin Films Conference,
Taipei, Taiwan, Nov. 17-20, 2019. |
| 38. |
C. C. Lee*, and C. W. Wang,
“Adhesive Strength Estimation of Film-Type Patterned
Active Matrix OLED Devices by Using Virtual Crack
Closure Technique,”
TACT2019 International Thin Films Conference,
Taipei, Taiwan, Nov. 17-20, 2019. |
| 39. |
C. C.
Lee*, P. C. Huang, and Y. C. Lin,
“Comprehensive Stress Effects Induced by Through
Silicon Via Integrated with Local S/D Stressor on
Performances of Nano-Scaled Devices in Silicon
Interposer Architecture,”
the 18th
International Symposium on Microelectronics and
Packaging jointed with the 21st
International Conference on Electronic Materials and
Packaging (ISMP-EMAP 2019), Busan,
Korea, Nov. 13-15, 2019. |
| 40. |
C. C. Lee*, P. C. Huang, and
C. W. Wang, “Performance Variation of Nano-Scaled
Devices in 3D-IC Packaging Architecture Induced by
TSV Residual Stress,”
ASME International Mechanical Engineering Congress
and Exposition (IMECE), Salt Lake City,
Utah, USA, Nov. 11-14, 2019. |
| 41. |
C. C.
Lee*, P. C. Huang, C. W. Wang, and
Oscar Chuang, “Stress Evaluation of Flexible
Displays with Multiple-Laminations Architecture
Enabled by Experimental Measurement and Simulation
Based Factorial Design,”
ASME International Technical Conference and
Exhibition on Packaging and Integration of
Electronic and Photonic Microsystems (InterPACK),
Anaheim, CA, USA, Oct. 7-9, 2019. |
| 42. |
C. C.
Lee*, and C. W. Wang, “Drop Impact
Analysis of AMOLED Display with Buffer Designs by
Using Dynamic Finite Element Simulation,”
the
26th
International Workshop on Active-Matrix Flatpanel
Displays and Devices (AM-FPD’19), Kyoto,
Japan, Jul. 2-5, 2019. |
| 43. |
C. C.
Lee*, P. C. Huang, and C. P. Hsieh,
“Interfacial Fracture Investigation of Patterned
Active Matrix OLED Driven by Amorphous-Si TFTs under
Film-Type Packaging Technology,”
3rd
International Conference on Applied Surface Science
(ICASS), Pisa, Italy, Jun. 17-20, 2019. |
| 44. |
C. C. Lee*, P. C. Huang, and
Y. H. Chang, “Substrate Pre-heating Effect on the
Residual Stress Evaluation of WC-based High Entropy
Superalloy During SLM Additive Manufacturing
Process,”
3rd
International Conference on Applied Surface Science
(ICASS), Pisa, Italy, Jun. 17-20, 2019. |
| 45. |
C. C. Lee*, R. C. Shih, and
C. P. Hsieh, “Adhesion Enhancement of Conductive
Graphene Film/PI by Using an Atmospheric Plasma
System,”
3rd
International Conference on Applied Surface Science
(ICASS), Pisa, Italy, Jun. 17-20, 2019. |
| 46. |
C. C. Lee*,
Y. F. Lin, Y. Y. Liou, C. C. Liang, S. T. Yeh, and
H. Y. Chen, “Simulated and Experimental
Demonstrations of Interfacial Adhesive Strength for
De-bonded Layer Applied on Flexible Electronics,”
3rd
International Conference on Applied Surface Science
(ICASS), Pisa, Italy, Jun. 17-20, 2019. |
| 47. |
C. C.
Lee*, Oscar Chuang, C. P. Hsieh, W. Y.
Cheng, and Steve Chiu, “Simulation and Experimental
Validations of EM/TM/SM Physical Reliability for
Interconnects Utilized in Stretchable and Foldable
Electronics,”
The 69th
IEEE Electronic Components Technology Conference
(ECTC 2019), Las Vegas, NV, USA, May
28-31, 2019. |
| 48. |
C. C.
Lee*, Y. Y. Liou, P. C. Huang, F. Hsu,
P. B. Lin, C. T. Ko, and Y. H. Chen, “Comprehensive
Investigation on Warpage Management of FOPLP with
Multi Embedded Ring Designs,”
The 69th IEEE Electronic Components Technology
Conference (ECTC 2019), Las Vegas, NV,
USA, May 28-31, 2019. |
| 49. |
C. C. Lee*, H. C. Liu, and
C. W. Wang, “Intrinsic Stress Effect of Fabricated
Processes on the Warpage and Microbump Reliability
of Thin-Type 3D-ICs Packaging,”
The 20th
International Conference on Electronics Materials
and Packaging (EMAP 2018), Hong Kong,
Dec. 17-20, 2018. |
| 50. |
C. C. Lee*, P. C. Huang, and
C. W. Wang, “Layout Effect of Stress Coatings
Integrated with Silicon-Carbon Semiconductor Alloy
on Nano-scaled Transistors with Protruding Gate,”
Proceedings of the 35th
National Conference on Mechanical Engineering (CSME),
Chiayi, Taiwan, Nov. 30-Dec. 1, 2018. |
| 51. |
C. C. Lee*, and J. Y. He,
“Mechanical Behavior Estimation of Single-Layer
Graphene by the Utilization of Atomistic Continuum
Mechanics Based Finite Element Simulation,”
Proceedings of the 42th
Conference on Theoretical and Applied Mechanics,
Taipei, Taiwan, Nov. 23-24, 2018. |
| 52. |
C. C.
Lee*, Y. Y. Liou, and P. C. Huang,
“Comprehensive Stress Impacts on Flexible Displays
under the Process-Induced Thermal and Subsequent
External Bending Loads,”
the Sixth Asian Conference on Mechanics of
Functional Materials and Structures (ACMFMS 2018),
Tainan, Taiwan. Oct. 26-29, 2018. |
| 53. |
C. C. Lee*, C. P. Hsieh, C.
W. Wang, W. Y. Cheng, and J. C. Chuang,
“Electromigration Effect of Flexible Fan-out
Packages,” 2018
International Microsystems Packaging Assembly and
Circuits Technology Conference (the 13th IMPACT
Conference), Taipei, Taiwan, Oct. 24-26,
2018. |
| 54. |
C. C. Lee*, J. Y. He, and P.
C. Huang, “Elastic Modulus Extraction of
Single-Crystal Copper by Using Spring-based Finite
Element Method,” the 2nd
International Conference on Mechanics (ICM 2018),
Yilan, Taiwan, Oct. 15-18, 2018.
(Invited Lecture) |
| 55. |
C. C.
Lee*, and P. C. Huang, “Layout Effect
of Polysilicon Wall Embedded in Shallow Trench
Isolation Region on the Performance of High-k/Metal
Gate PMOSFETs,” 16th
International Nanotech Symposium & Exhibition (NANO
KOREA 2018), Seoul, Jul. 10-13, 2018. |
| 56. |
K. N. Chiang*, V.
Ramachandran, K. C. Wu, and C. C. Lee,
“Reliability Life Assessment of WLCSP Using
Different Creep Models,”
The 68th
IEEE Electronic Components Technology Conference
(ECTC 2018), San Diego, CA, USA, May
29-Jun. 1, 2018. |
| 57. |
C. C. Lee*, H. C. Liu, and
C. P. Hsieh, “Reliability Estimation of 3D-ICs
Packaging Using Fabricated-Oriented Simulation,”
Proceedings of the 59th
Conference on Aeronautical and Astronautical Society
of the Republic of China, Taichung,
Taiwan, Dec. 9, 2017. |
| 58. |
C. C. Lee*, H. C. Liu, and
C. P. Hsieh, “The Accompanied Effects of
Process-Oriented and Temperature Cycling Loadings on
the Warpage of Thin-Type 3D-ICs Packaging Structure
and the Creep Behavior of Microjoints,”
Proceedings of the 34th
National Conference on Mechanical Engineering (CSME),
Taichung, Taiwan, Dec. 1-2, 2017. |
| 59. |
C. C. Lee*, Y. Y. Liou, and
P. C. Huang, “Structural Designs of Gas Barriers For
Diminishing Stress-Induced Failure Occurred in
Flexible Electronics,”
Proceedings of the 41th
Conference on Theoretical and Applied Mechanics,
Tainan, Taiwan, Nov. 24-25, 2017. |
| 60. |
C. C.
Lee*, “Material Characteristic Effect
of Wafer Level Underfill on the Microbump
Reliability of Ultra-Thin-Chip Stacking Type 3D-IC
Assembly during Thermal Cycling Tests,”
International Multi-Conference on Engineering
and Technology Innovation 2017 (IMETI2017),
Hualien, Taiwan, Oct. 27-31, 2017. |
| 61. |
C. C. Lee*, J. Y. He, and P.
C. Huang, “Redistributed Geometrical Effect of
Cu-Filled Stacked Vias on the Thermal-Induced Stress
and Warpage of 3D-ICs Embedded Interposer,”
International Multi-Conference on Engineering
and Technology Innovation 2017 (IMETI2017),
Hualien, Taiwan, Oct. 27-31, 2017. |
| 62. |
C. C. Lee*, J. Y. He, C. P.
Hsieh, C. C. Tsai, and J. C. Chuang, “Influence
Estimation of Process-Induced Stress on Flexible
Electronics Packaging,”
2017 International Microsystems Packaging
Assembly and Circuits Technology Conference (the 12th
IMPACT Conference), Taipei, Taiwan. Oct.
25-27, 2017. |
| 63. |
C. C. Lee*,
and P. C. Huang, “Layout Design Effect of Transverse
Dummy Polys on Stress-Induced Performance of
Ge-Based High-k/Metal Gate NMOSFETs,”
TACT 2017 International Thin Films Conference,
Hualien, Taiwan, Oct. 15-18, 2017. |
| 64. |
C. C. Lee*, and P. C. Huang,
“Resultant Impacts of Stress Gradient CESL and
Embedded S/D SiC Stressors on Nano-Scaled Si-Based
Strained NMOSFETs,”
TACT 2017 International Thin Films Conference,
Hualien, Taiwan, Oct. 15-18, 2017. |
| 65. |
C. C. Lee*,
and C. P. Hsieh, “Succeeded Foundation Effect of
Stretched Gate Width and Dummy Diffusion Region on
Strained Silicon PMOSFETs,”
TACT 2017 International Thin Films Conference,
Hualien, Taiwan, Oct. 15-18, 2017. |
| 66. |
T. C. Cheng*,
C. C. Lee, C. C. Chiang, and T.
H. Chen, “Improved Field Emission Properties of
Carboxylated MWCNTs on Flexible Carbon Cloth
Substrate,”
The 24th
Congress of the International Commission for Optics
(ICO-24), Tokyo, Japan, Aug. 21-25,
2017. |
| 67. |
C. C.
Lee*, and P. C.
Huang, “Lattice Orientation Effect of Local
Stressors on the Width Dependence Performance of
High-k Metal Gate PMOSFETs,”
15th
International Nanotech Symposium & Exhibition (NANO
KOREA 2017), Seoul, Jul. 12-14, 2017. |
| 68. |
C. C.
Lee*, P. C. Huang, and C. W. Wang, “The
Development of Estimated Methodology for Interfacial
Adhesion of Semiconductor Coatings Having an
Enormous Mismatch Extent,”
2nd
International Conference on Applied Surface Science
(ICASS), Dalian, China, Jun. 12-15,
2017. |
| 69. |
C. C. Lee*, J. Y. He, P. C.
Huang, and C. W. Wang, “Interactive Field Effect of
Atomic Bonding Force on Nano-Scale Metal Elastic
Modulus By Using Atomistic-Continuum Simulation,”
2nd
International Conference on Applied Surface Science
(ICASS), Dalian, China, Jun. 12-15,
2017. |
| 70. |
C. C. Lee*, J. Y. He, P. C.
Huang, and H. C. Liu, “Experimental Measurements and
Simulated Estimations for the Interfacial Adhesion
Between Glass Interposer and SiNx Coatings,”
2nd
International Conference on Applied Surface Science
(ICASS), Dalian, China, Jun. 12-15,
2017. |
| 71. |
C. C. Lee*, J. Y. He, P. C.
Huang, and H. C. Liu, “Layout Designs of Surface
Barrier Coatings for Boosting the Capability of
Oxygen/Vapour Obstruction Utilized in Flexible
Electronics,”
2nd
International Conference on Applied Surface Science
(ICASS), Dalian, China, Jun. 12-15,
2017. |
| 72. |
M. H. Hsu, C. C.
Lee, and K. N. Chiang*, “A Modified Acceleration
Factor Empirical Equation for BGA Type Package,”
The 67th
IEEE Electronic Components Technology Conference
(ECTC 2017), Orlando, Florida, USA, May
30-Jun. 2, 2017. |
| 73. |
C. C. Lee*,
H. N. Liu, and Y. Y. Liou, “Investigating
Interfacial Fracture Energy of Stacked Films by
Using a Multi-level Sub-modeling Finite Element
Method,”
Proceedings of the 33th
National Conference on Mechanical Engineering (CSME),
Hsinchu, Taiwan, Dec. 3-4, 2016. |
| 74. |
C. H. Chen, P. C.
Huang, and C. C. Lee*,
“Residual Stress Effect of Through silicon Vias on
the Operated Performance of Nano-Scaled Strained-Si
Devices,”
Proceedings of the 40th
Conference on Theoretical and Applied Mechanics,
Hsinchu, Taiwan, Nov. 25-26, 2016. |
| 75. |
C. C. Lee*,
D. Y. Lee, C. P. Hsieh, and C. H. Liu, “The Effect
of Contact-Etch-Stop-Layer and Si1-xGex Channel
Mechanical Properties on Nano-Scaled Short Channel
NMOSFETs with Dummy Gate Arrays,”
2016 International Electron Devices and
Materials Symposium (IEDMS), Taipei,
Taiwan, Nov. 24-25, 2016. |
| 76. |
C. C. Lee*, and P. C. Huang,
“Investigation of Chip-Interposer Interaction by
Loading the Residual Stress of Copper-Filled Through
Silicon Via,”
2016 International Electron Devices and
Materials Symposium (IEDMS), Taipei,
Taiwan, Nov. 24-25, 2016. |
| 77. |
J. S. Hsu,
C. C. Lee*, B. J. Wen, P. C.
Huang, and C. K. Xie, “Experimental and Simulated
Investigations of a Thin Polymer Substrate with ITO
Coatings under Fatigue Bending Loadings,”
International Multi-Conference on Engineering
and Technology Innovation 2016 (IMETI2016),
Taichung, Taiwan, Oct. 28-Nov. 1, 2016. |
| 78. |
C. P. Wang*, and C. C. Lee,
“Effects of Current Crowding and Temperature
Distribution on the Performance of Power LEDs,”
International Multi-Conference on Engineering
and Technology Innovation 2016 (IMETI2016),
Taichung, Taiwan, Oct. 28-Nov. 1, 2016. |
| 79. |
C. C. Lee*, C. H. Chen, and
P. C. Huang “Residual Stress Investigation of TSVs
on MOSFETs by Using Submodeling Finite Element
Technique,”
IEEE International Microsystem, Packaging,
Assembly and Circuits Technology Conference
(IMPACT-IAAC 2016 Joint Conference),
Taipei, Taiwan, Oct. 26-28, 2016. |
| 80. |
C. C. Lee*,
“Stress-Induced Failure Estimation of Embedded
Carrier Utilized in 3D-ICs Integrations,”
2nd
International Conference on Computing and Precision
Engineering (ICCPE), Kenting, Taiwan,
Sep. 30-Oct. 3, 2016. |
| 81. |
C. C. Lee*,
“Factorial Designs of Multi-Coatings for Induced
Stresses of Advanced Flexible Displays,”
23rd
International Workshop on Active-Matrix Flatpanel
Displays and Devices (AM-FPD’16), pp.
67-68, Kyoto,
Japan, Jul. 6-8, 2016. |
| 82. |
C. C. Lee*,
T. C. Cheng, and P. C. Huang, “Comprehensive Effects
of Strained Ge1-xSnx and Device Layout Arrangement
on a Nano-Scaled Ge-based PMOSFET with a Short
Channel,”
International SiGe Technology and Device Meeting
(ISTDM 2016), pp. 65-66, Nagoya, Japan, Jun. 7-11,
2016. |
| 83. |
C. C. Lee*, P. C. Huang, Y.
T. Kuo, D. Y. Li, and C. H. Liu, “Interaction
Influence of S/D GeSi Lattice Mismatch and Stress
Gradient of CESL on Nano-Scaled Strained NMOSFETs,”
7th
International Symposium on Control of Semiconductor
Interfaces (ISCSI-VII), pp. 43-44, Nagoya, Japan,
Jun. 7-11, 2016. |
| 84. |
C. C. Lee*, P. C. Huang, and
B. T. Chian, “Development and Demonstration of
Equivalent Material Characteristics for Microbump
Arrays Utilized in Failure Estimation of
Chip-on-Chip Packaging,”
2016 Intersociety Conference on Thermal and
Thermomechanical phenomena in Electronic Systems
(ITHERM 2016), Las Vegas, NV, USA, May
31-Jun. 3, 2016. |
| 85. |
C. C. Lee*,
C. P. Hsieh, M. H. Liao, “Accompanied Arrangement
Effect of Stretched Gate Width and Dummy Diffusion
Region on Strained Silicon PMOSFETs,”
7th IEEE
International Nanoelectronics Conference (IEEE
INEC2016), Chengdu, China, May 9-11,
2016. |
| 86. |
H. W. Hsu, and C. C. Lee*,
“Device Layout Effect of Strained Ge-Based NMOSFETs
with Ge1-xSix Stressors,”
7th IEEE
International Nanoelectronics Conference (IEEE
INEC2016), Chengdu, China, May 9-11,
2016. |
| 87. |
C. C. Lee*, Y. H. Guo, H. C.
Liu, Y. M. Lin, and T. C. Chang, “Managing Induced
Warpage of 3D-ICs Packaging Using Multi-Layered
Molding Materials,” 7th
IEEE International Nanoelectronics Conference (IEEE
INEC2016), Chengdu, China, May 9-11,
2016. |
| 88. |
C.
C. Lee*, Y. H. Guo,
and H. C. Liu, “Mechanical Behavior Investigation of
Creep and Warpage for Thin-Type Three-Dimensional
Integrated Circuits Packaging Structures,”
Proceedings of the 32th National Conference on
Mechanical Engineering (CSME),
Kaohsiung, Taiwan, Dec. 11-12, 2015. |
| 89. |
C. C. Lee*,
B. T. Chian, Y. Y. Liou, and H. N. Liu, “Analysis
and Investigation of Material Equivalent
Mechanics-Based Simulated Approach on
Three-Dimensional Chip Stacking Structure,”
Proceedings of the 39th
Conference on Theoretical and Applied Mechanics,
Taipei, Taiwan, Nov. 20-21, 2015. |
| 90. |
Y. T. Kuo, D.Y. Li, C. C. Lee,
and C. H. Liu*, “Stress Gradient Influence of Tensile
Contact Etch Stop Layer on Strained NMOSFETs,”
2015 International Electron Devices and
Materials Symposium (IEDMS), Tainan,
Taiwan, Nov. 19-20, 2015. |
| 91. |
C. C. Lee*,
S. W. Cheng, and Y. Y. Liou, “Adhesion Investigation
of Stacked Thin Film in Organic Light-Emitting Diode
Display Architecture,”
TACT 2015 International Thin Films Conference,
Tainan, Taiwan, Nov.15-18, 2015. |
| 92. |
C. C. Lee*,
S. W. Cheng, and P. C. Huang, “STI Geometrical
Influence of Recessed Surface on Array-Type
Arrangements of Nano-Scaled Devices Strained by CESL
and Ge-based Stressors,”
TACT 2015 International Thin Films Conference,
Tainan, Taiwan, Nov.15-18, 2015.
(Poster Merit Awards of
TACT2015) |
| 93. |
C. C. Lee*,
T. L. Tzeng, and P. C. Huang, “Development for
Equivalent Material Properties of Microbump Utilized
in Simulation of Chip Stacking Packaging,”
International Multi-Conference on Engineering
and Technology Innovation 2015 (IMETI2015),
Kaohsiung, Taiwan, Oct. 30-Nov. 3, 2015. |
| 94. |
C. H. Chen and C. C. Lee*,
“Residual Stress Effect of Copper-Filled Through
Silicon Via on Performances of Nano-Scaled Devices
in 3D-ICs Interposer,”
IEEE International Microsystem, Packaging,
Assembly and Circuits Technology Conference (the 10th
IMPACT Conference), Taipei, Taiwan, Oct.
21-23, 2015. (IEEE IMPACT
2015 Student Paper Award) |
| 95. |
B. J. Wen,
C. C. Lee*, and C. P. Hsieh, “Nano-Structure
Fabrication on the Nitride Films by Automatic
Scanning Probe Oxidation,”
12th
International Symposium on Measurement Technology
and Intelligent Instruments (ISMTII 2015),
Taipei, Taiwan, Sep. 22-25, 2015. |
| 96. |
C. C. Lee*,
R. C. Cheng, Y. M. Lin, H. N. Liu, Y. Y. Liou, and
T. C. Chang, “Solution of Warpage Improvement for
Embedded Interposer Carrier Integrated into 3D-ICs
Packaging,”
International Interconnect Technology
Conference/ Materials for Advanced Metallization
Conference (IITC/MAM 2015), Grenoble,
France, May 18-21, 2015. |
| 97. |
C. C. Lee*, Y. M. Lin, Y. Y.
Liou, C. J. Zhan, and T. C. Chang, “Fabrication,
Assembly, Failure Estimations of for Ultra-Thin
Chips Stacking by Using Pre-Molding Technology,”
International Interconnect Technology
Conference/ Materials for Advanced Metallization
Conference (IITC/MAM 2015), Grenoble,
France, May 18-21, 2015. |
| 98. |
C. C. Lee*, C. P. Hsieh, S.
W. Cheng, and M. H. Liao, “Architecture
Investigation of GeSn Alloy and CESL on Strained
Ge-Based PMOSFETs,”
9th
International Conference on Silicon Epitaxy and
Heterostructures (ICSI-9), Montreal,
Canada, May 17-22, 2015. |
| 99. |
C. C. Lee*, C. P. Hsieh, P.
C. Huang, S. W. Cheng, and M. H. Liao, “A
Performance Study of Ge1-xSix
on Ge-Based NMOSFETs by Using Device Simulation
Combined with Higher Order Stress-Piezoresistive
Relationships,”
9th
International Conference on Silicon Epitaxy and
Heterostructures (ICSI-9), Montreal,
Canada, May 17-22, 2015. |
| 100. |
C. C. Lee*, T. L. Tzeng, and
P. C. Huang, “Development of Simulation-Approach for
3D Chip Stacking with Fine-Pitch Array-Type
Microbumps,”
2015 International Conference on Electronics
Packaging & iMAPS All Asia Conference (ICEP-IAAC
2015), Kyoto, Japan, Apr. 14-17, 2015. |
| 101. |
C. C. Lee*,
B. T. Chian, J. S. Hsu, and H. N. Liu, “Stress
Failure Estimation of 3D-IC Integrations by Using
Embedded Interposers,”
Proceedings of the 31th National Conference on
Mechanical Engineering (CSME), Taichung,
Taiwan, Dec. 6-7, 2014. |
| 102. |
B. J. Wen,
C. C. Lee*, M. W. Chang, H. K. Lin,
and Y. H. Guo, “Investigation of Surface Properties
of Patterning Electrode in a Highly Flexible
Package,”
Proceedings of the 38th Conference on
Theoretical and Applied Mechanics,
Keelung, Taiwan, Nov. 21-22, 2014. |
| 103. |
C. C. Lee*, and S. W. Cheng,
“Performance and Reliability Investigation of
Ge-Based PMOSFETs by Utilizing Integrated Strained
Effects of GeSn Alloy and CESL,”
2014 International Electron Devices and
Materials Symposium (IEDMS), Hualien,
Taiwan, Nov. 20-21, 2014. |
| 104. |
C. C. Lee*, and C. C. Huang,
“Induced Thermo-Mechanical Reliability of
Copper-Filled TSV Interposer by Transient Selective
Annealing Technology,”
2014 International Electron Devices and
Materials Symposium (IEDMS), Hualien,
Taiwan, Nov. 20-21, 2014. |
| 105. |
C. C. Lee*,
and P. C. Huang, “Stress-induced Failure Predictions
of Flexible Electronics with Nano-Scaled
Thin-Films,”
the 2014 Asian Conference on Nanoscience and
Nanotechnology (AsiaNANO 2014), Jeju,
Korea, Oct. 26-29, 2014. |
| 106. |
C. C. Lee*, W. C. Wang, P. C.
Huang, Y. Y. Liou, and H. N. Liu, “Improvements of
Stress Migration in Nano-scaled Copper
Interconnects,”
the 2014 Asian Conference on Nanoscience and
Nanotechnology (AsiaNANO 2014), Jeju,
Korea, Oct. 26-29, 2014. |
| 107. |
B. J. Wen, C. C.
Lee*, M. W. Chang, H. K. Lin, Y. Y.
Liou, and S. W. Cheng, “Surface Properties of
Nano-film Type Patterning Electrode on Flexible
Substrate for Bending Test,”
the 2014 Asian Conference on Nanoscience and
Nanotechnology (AsiaNANO 2014), Jeju,
Korea, Oct. 26-29, 2014. |
| 108. |
C. C. Lee*, C. P. Hsieh, Y.
H. Guo, Y. M. Lin, C. J. Zhan, and T. C. Chang,
“Reliability Enhancement of Ultra-Thin Chip Assembly
Module in 3D-ICs Integrations by the Assistance of
Molding Compounds,”
IEEE International Microsystem, Packaging,
Assembly and Circuits Technology Conference
(IMPACT-EMAP 2014 Joint Conference),
Taipei, Taiwan. Oct. 22-24, 2014.
(IEEE IMPACT-EMAP 2014
Outstanding Paper Award) |
| 109. |
C. C. Lee*,
C. P. Hsieh, M. H. Liao, S. W. Cheng, and Y. H. Guo,
“Effects of Array Type of Dummy Active Diffused
Region and Gate Geometries on Narrow NMOSFETs with
SiC S/D Stressors,”
the 6th IEEE International Nanoelectronics
Conference (IEEE INEC2014), Sapporo,
Japan, Jul. 28-31, 2014. |
| 110. |
C. C. Lee*,
P. J. Wei, B. T. Chian, and C. H. Tsai, “Predictions
and Measurements of Interfacial Adhesion among
Encapsulated Thin Films of Flexible Devices,”
the 7th International Conference on
Technological Advances of Thin Films & Surface
Coatings (ThinFilms2014), Chongqing,
China, Jul. 15-18, 2014. (ThinFilms2014
Poster Competition Second Prize) |
| 111. |
C. C. Lee*, W. C. Wang, and
T. L. Tzeng, “Phenomenon Investigation of
Stress-Induced Voiding for Nano-Scaled Copper Thin
Films,” the 7th
International Conference on Technological Advances
of Thin Films & Surface Coatings (ThinFilms2014),
Chongqing, China, Jul. 15-18, 2014. |
| 112. |
J. S.
Hsu*, B. J. Wen, C. C. Lee,
and J. Y. Jheng, “The effects of thermal annealing
on cycling bending resistance of ITO/PET using phase
shifting shadow moiré,”
the 7th International Conference on Technological
Advances of Thin Films & Surface Coatings
(ThinFilms2014), Chongqing, China, Jul.
15-18, 2014. |
| 113. |
B. J.
Wen, C. C. Lee*, J. S. Hsu,
and Y. H. Guo, “Investigation of Optical and
Flexible Characteristics for Film Type Cholesteric
LCD under Fatigue Bending and Torsion Loadings,”
the 7th International Conference on
Technological Advances of Thin Films & Surface
Coatings (ThinFilms2014), Chongqing,
China, Jul. 15-18, 2014. |
| 114. |
K. N.
Chiang*, C. C. Lee, and C. T.
Lin, “Study on Thermal Induced Stress Hysteresis
Behavior of Thin Film Sensor,”
the 7th International Conference on
Technological Advances of Thin Films & Surface
Coatings (ThinFilms2014), Chongqing,
China, Jul. 15-18, 2014. |
| 115. |
C. C. Lee*, C. P. Hsieh, M.
H. Liao, S. W. Cheng, and Y. H. Guo, “Combined
Layout Effect of Protrudent Gate Width and Dummy
Diffusion Region on Strained Silicon PMOSFETs,”
12th International Nanotech Symposium &
Exhibition (NANO KOREA 2014), Seoul,
Jul. 2-4, 2014. |
| 116. |
C. C. Lee*, S. T. Chang, S.
W. Cheng, and B. T. Chian, “Performance
Investigation of a Nanoscale Strained Ge PMOSFETs
with a Ge-Sn Alloy Stressor,”
12th International Nanotech Symposium &
Exhibition (NANO KOREA 2014), Seoul,
Jul. 2-4, 2014. |
| 117. |
C. H.
Liu*, C. C. Lee, K. C. Lin,
Y. H. Lin, and Y. C. Lai, “Physically Based Modeling
for Stress Assessment in MOS Devices,”
the 10th IEEE International Conference on
Electron Devices and Solid-State Circuits
(EDSSC2014), Chengdu, China, Jun. 18-20,
2014. (Invited paper) |
| 118. |
C. C. Lee*, K. S. Kao, and T. C. Chang, “Microbump Reliability Prediction of Stacked Thin Chips in 3D-ICs Assembly under a Temperature Cycling Test,” The 3rd International Symposium on Next-Generation Electronics (ISNE 2014), Taoyuan, Taiwan, May 7-10, 2014. |
| 119. |
C. C. Lee*, Y. H. Guo, Y. M. Lin, C. J. Zhan, and T. C. Chang, “Assembly Reliability Improvement of 3D-ICs Packaging Using Pre-Stuffed Molding Material,” The 3rd International Symposium on Next-Generation Electronics (ISNE 2014), Taoyuan, Taiwan, May 7-10, 2014. |
| 120. |
Y. M. Lin*, C. J. Zhan, Z. C. Hsiao, H. C. Fu, R. S. Cheng, Y. W. Huang, S. Y. Huang, S. M. Chen, C. W. Fan, C. H. Chien, C. T. Ko, Y. H. Guo, C. C. Lee, Y. Tsutsumi, J. Woo, Y. Suzuki, Y. Sato, C. T. Liu, and C. H. Chao, “A Novel 3D IC Assembly Process for Ultra-Thin Chip Stacking,” International Conference Electronics Packaging (ICEP 2014), Toyama, Japan, Apr. 23-25, 2014. |
| 121. |
P. T. Lin*, W. L. Chen, Y. C. Lee, M. Chang, Y. C. Chou, and C. C. Lee, “Design and Optimization of A Generalized Wide-Bandwidth White Light System for Light-Eye Technology (LeyeT),” 2014 IEEE International Symposium on Bioelectronics and Bioinformatics (IEEE ISBB 2014), Chung-Li, Taiwan, Apr. 11-14, 2014. |
| 122. |
C. C. Lee*, Y. H. Guo, B. T. Chian, and T. C. Chang, “Influence of Arrangement Design and Mechanical Property for Molding Material on 3D-ICs Packaging,” Proceedings of the 30th National Conference on Mechanical Engineering (CSME), Ilan, Taiwan, Dec. 6-7, 2013. |
| 123. |
C. C. Lee*, T. L. Tzeng, and C. C. Huang, “Stress Distribution Prediction of 3D-IC Integration by Using Transient Selective Annealing Approach,” Proceedings of the 37th Conference on Theoretical and Applied Mechanics, Hsinchu, Taiwan, Nov. 8-9, 2013. |
| 124. |
C. C. Lee*, T. L. Tzeng, Y. J. Lai, L. Lin, C. J. Zhan, and T. C. Chang, “Novel Assembly Framework of Bi-Layered Molding Materials for 3D-ICs Packaging,” IEEE International Microsystem, Packaging, Assembly and Circuits Technology Conference (IMPACT-IAAC 2013 Joint Conference), Taipei, Taiwan. Oct. 22-25, 2013. |
| 125. |
C. C. Lee*, W. C. Wang, T. L. Tzeng, and W. L. Huang, “Approaches toward Improvement of Stress-Induced Voiding in Advanced Interconnect Technologies,” TACT 2013 International Thin Films Conference, Taipei, Taiwan, Oct.5-9, 2013. |
| 126. |
C. C. Lee*, C. H. Liu, H. H. Teng, and T. L. Tzeng,“Geometric Effect of Polygates on Nanoscale nMOSFETs Using Silicon-Carbon Alloy in Strain Engineering,” TACT 2013 International Thin Films Conference, Taipei, Taiwan, Oct.5-9, 2013. |
| 127. |
C. C. Lee*, T. L. Tzeng, Y. J. Lai, and C. C. Huang, “Stress Estimation of Thermo-Mechanical Behavior for Copper TSV Stacking Films Induced by Transient Selective Annealing Technology,” TACT 2013 International Thin Films Conference, Taipei, Taiwan, Oct.5-9, 2013. |
| 128. |
C. C. Lee*, C. H. Liu, R. H. Deng, and Y. H. Lin, “Structural Optimizations of Silicon Based NMOSFETs with a Sunken STI Pattern by Using a Robust Stress Simulation Methodology,” 11th International Nanotech Symposium & Exhibition (NANO KOREA 2013), Seoul, Jul. 10-12, 2013. |
| 129. |
C. C. Lee*, Z. H. Chen, C. H. Liu, and T. L. Tzeng, “A Resultant Stress Effect of CESL and Geometrical Designs of Poly Gateon Nano-Scaled nMOSFETs with a Si1-xGex Channel,” 11th International Nanotech Symposium & Exhibition (NANO KOREA 2013), Seoul, Jul. 10-12, 2013. |
| 130. |
C. C. Lee*, C. H. Liu, R. H. Deng, H. W. Hsu, and T. L. Tzeng, “Investigation of Consequent Process-Induced Stress for NMOSFET with a Sunken STI Pattern,” 6th International Symposium on Control of Semiconductor Interfaces (ISCSI-VI), Fukuoka, Japan, Jun. 2-6, 2013. |
| 131. |
C. C. Lee*, C. H. Liu, H. W. Hsu, M. H. Hung, and Y. H. Lin, “Extended Poly Gate Effect on the Performance of Strained PMOSFETs with a Narrow Channel Width,” 8th International Conference on Silicon Epitaxy and Heterostructures (ICSI-8), Fukuoka, Japan, Jun. 2-6, 2013. |
| 132. |
C. C. Lee*, C. H. Liu, H. W. Hsu, Z. H. Chen, H. H. Teng, and Y. J. Lai, “Mechanical Property Effects of Si1-xGex Channel and Stressed CESL on Nano-Scaled nMOSFETs,” 8th International Conference on Silicon Epitaxy and Heterostructures (ICSI-8), Fukuoka, Japan, Jun. 2-6, 2013. |
| 133. |
C. C. Lee*, “Flexible Stress Estimations of OLED Devices Packaging Using Analytical Solutions and Numerical Simulations of Stacking Thin-Films,” 2013 International Conference on Computational & Experimental Engineering and Sciences (ICCES'13), Seattle, USA, May 24-28, 2013. |
| 134. |
P. T. Lin*, Y. C. Lee, M. Chang, Y. C. Chou, and C. C. Lee, “A Light-Eye Technology (LeyeT) for Biomedical Applications,” 10th World Congress on Structural and Multidisciplinary Optimization (WCSMO10), Orlando, Floria, USA, May 19-24, 2013. |
| 135. |
Y. C. Chiou, C. C. Lee, T. L. Tzeng, and C. C. Huang*, “The Young’s Modulus of Composite Spacer Contributed on the Stress Effect of N-MOSFET with Contact-Etch-Stop Layer Stressor,” International Conference on Metallurgical Coatings and Thin Films (ICMCTF 2013), San Diego, CA, USA, Apr. 29-May 3, 2013. |
| 136. |
C. C. Lee*, Y. J. Lai, and C. C. Huang, “An Overview of Interfacial Fracture Energy Predictions for Stacked Thin Films Using Four-Point Bending Framework,” International Conference on Metallurgical Coatings and Thin Films (ICMCTF 2013), San Diego, CA, USA, Apr. 29-May 3, 2013. |
| 137. |
C. C. Lee*, Y. H. Lin, and C. C. Huang, “Thermo-Mechanical Failure Behavior of Copper TSV Induced by Transient Selective Annealing Technology,” International Conference on Metallurgical Coatings and Thin Films (ICMCTF 2013), San Diego, CA, USA, Apr. 29-May 3, 2013. |
| 138. |
C. C. Lee*, P. T. Lin, K. S. Kao, R. C. Cheng, C. J. Zhan, J. L. Lau, and T. C. Chang, “Reliability-Based Design Guidance of 3D ICs Packaging with Wafer Level Underfill and Dummy Cu/Ni/SnAg Microbumps,” Materials for Advanced Metallization Conference (MAM 2013), Leuven, Belgium, Mar. 10-13, 2013. |
| 139. |
C. C. Lee*, K. S. Kao, Leon Lin, J. Y. Chang, F. J. Leu, Y. L. Lu, and T. C. Chang, “Investigation of Pre-Bending Substrate Design on Packaging Assembly of IGBT Power Module,” Materials for Advanced Metallization Conference (MAM 2013), Leuven, Belgium, Mar. 10-13, 2013. |
| 140. |
C. C. Lee*, K. S. Kao, and C. J. Zhan, “Reliability Enhancements of Chip-on-Chip Package with Layout Designs of Microbumps,” Materials for Advanced Metallization Conference (MAM 2013), Leuven, Belgium, Mar. 10-13, 2013. |
| 141. |
C. C. Lee*, T. F. Yang, K. S. Kao, R. C. Cheng, C. J. Zhan, and T. H. Chen, “Assembly Analysis of Cu/Ni/SnAg Microbump for Stacking Thin Chips in a Fine Pitch Package Using a Wafer-Level Underfill,” 14th International Conference on Electronics Materials And Packaging (EMAP2012), pp.104-110, Hong Kong, Dec. 13-16, 2012. |
| 142. |
C. C. Lee*, T. L. Tzeng, C. S. Wu, T. F. Yang, and T. H. Chen, “Warpage Induced Stress Effect on Microbump Assembly of 3D ICs Packages,” Proceedings of the 29th National Conference on Mechanical Engineering (CSME), Kaohsiung, Taiwan, Dec. 7-8, 2012. |
| 143. |
C. C. Lee*, “Fine Pitch Microbump Assembly of 3D ICs Packages Using Thermo-Compression Approach,” 2012 ANSYS Taiwan User Conference, Taipei, Taiwan, Nov. 29, 2012. |
| 144. |
C. C. Lee*, C. S. Wu, T. L. Tseng, C. H. Tsai, S. T. Yeh, Y. H. Peng, and K. J. Chen,“Influences of Critical Designed Factors on Mechanical Reliability of Flexible OLED Package,” Proceedings of the 36th Conference on Theoretical and Applied Mechanics, ChungLi, Taiwan, Nov. 16-17, 2012. |
| 145. |
C. C. Lee*, C. S. Wu, T. L. Tzeng, C. H. Tsai, S. T. Yeh, Y. H. Peng, and K. J. Chen, “Packaging Designs and Flexural Stress Estimation for Thin-Film Types of OLED Devices,” 2012 International Microsystems Packaging Assembly and Circuits Technology Conference (the 7th IMPACT Conference), Taipei, Taiwan. Oct. 24-26, 2012. |
| 146. |
C. C. Lee*, C. H. Liu, M. H. Hung, R. H. Deng, and C. S. Wu, “Bending Stress Effect of Extended Poly Gate on the Performance of Nanoscale Strained PMOSFETs,” 10th International Nanotech Symposium & Exhibition (NANO KOREA 2012), Seoul, Aug. 16-18, 2012. |
| 147. |
C. C. Lee*, C. H. Liu, H. H. Teng, and Z. H. Chen, “Geometrical Effect of Poly Gate on Nanoscale NMOSFETs by Using Silicon-Carbon Alloy of Strain Engineering,” 10th International Nanotech Symposium & Exhibition (NANO KOREA 2012), Seoul, Aug. 16-18, 2012. |
| 148. |
C. C. Lee*, C. H. Liu, and H. H. Teng, “Protruding Design Effect of Poly Gate on Nanoscale NMOSFETs with Advanced Strain Engineering,” the 6th International Conference on Technological Advances of Thin Films & Surface Coatings (ThinFilms2012), Singapore, Jul. 14-17, 2012. |
| 149. |
C. C. Lee*, C. S. Wu, C. H. Tsai, S. T. Yeh, Y. H. Peng, and K. J. Chen, “Mechanical Stress Estimation and Validation of ITO Film on Highly Flexible OLED Device,” the 6th International Conference on Technological Advances of Thin Films & Surface Coatings (ThinFilms2012), Singapore, Jul. 14-17, 2012. |
| 150. |
C. C. Lee*, Y. F. Su, C. S. Wu, and K. N. Chiang, “Investigation of Interconnect Design on Interfacial Cracking Energy of Al/TiN Barriers under a Flexural Load,” the 6th International Conference on Technological Advances of Thin Films & Surface Coatings (ThinFilms2012), Singapore, Jul. 14-17, 2012. |
| 151. |
H. W. Hsu, H. S. Huang, C. C. Lee, S. Y. Chen, H. H. Teng, M. H. Hung, M. R. Peng, M. C. Wang, and C. H. Liu*, “Phenomenon of nMOSFETs with CESL Stressor for Different Channel Lengths,” the 6th International Conference on Technological Advances of Thin Films & Surface Coatings (ThinFilms2012), Singapore, Jul. 14-17, 2012. |
| 152. |
C. C. Lee*, K. S. Kao, T. F. Yang, R. C. Cheng, C. J. Zhan, and T. H. Chen, “Evaluation of Cu/Ni/SnAg Microbump Bonding Processes for Thin-Chip-on-Chip Package Using a Wafer-Level Underfill Film,” 2012 Intersociety Conference on Thermal and Thermomechanical phenomena in Electronic Systems (ITHERM 2012), San Diego, USA, May 30-Jun. 1, 2012. (EI) |
| 153. |
C. C. Lee*, C. S. Wu, B. F. Hsieh, and S. T. Chang, “Patterned Film Effects on the Adhesion of Al/TiN Barrier using Fracture-Energy Based Finite Element Analysis,” International Conference on Metallurgical Coatings and Thin Films (ICMCTF 2012), San Diego, CA, USA, Apr. 23-27, 2012. |
| 154. |
H. W. Hsu, H. S. Huang, C. C. Lee, H. H. Teng, M. H. Hung, M. R. Peng, M. C. Wang, S. Y. Chen, and C. H. Liu*, “Stress Analysis in Channel Region for nMOSFET Combining CESL Stressor and SiGe Channel,” International Conference on Automatic Control and Artificial Intelligence (ACAI 2012), Xiamen, China, Mar. 24-26, 2012. |
| 155. |
T. Y. Hung, S. Y. Chiang, C. C. Lee, C. C. Wang, K. C. Lu, and K. N. Chiang*, “Thermal Cycling Period Effect of Fatigue Life of the Power Module,” Materials for Advanced Metallization Conference (MAM 2012), Grenoble, France, Mar. 11-14, 2012. |
| 156. |
C. C. Lee*, T. F. Yang, C. S. Wu, K. S. Kao, R. C. Cheng, and T. H. Chen, “Reliability Estimation and Failure Mode Prediction for 3D Chip Stacking Package with the Application of Wafer-Level Underfill,” Materials for Advanced Metallization Conference (MAM 2012), Grenoble, France, Mar. 11-14, 2012. |
| 157. |
C. C. Lee*, T. F. Yang, C. S. Wu, K. S. Kao, C. W. Fang, C. J. Zhan, J. H. Lau, and T. H. Chen, “Impact of High Density TSVs on the Assembly of 3D ICs Packaging,” Materials for Advanced Metallization Conference (MAM 2012), Grenoble, France, Mar. 11-14, 2012. |
| 158. |
C. C. Lee*, Y. S. Shih, C. S. Wu, C. H. Tsai, S. T. Yeh, and K. J. Chen, “Bending Stress Impacts on a Thin-Film Type OLED Display of Flexible Packaging,” Proceedings of the 28th National Conference on Mechanical Engineering (CSME), Taichung, Taiwan, Dec. 10-11, 2011. |
| 159. |
C. C. Lee*, Y. S. Shih, and C. S. Wu, “Simulation-Based Prediction of Effective Modulus for a Through-Silicon Via (TSV) Silicon Interposer,” Proceedings of the 35th Conference on Theoretical and Applied Mechanics, Tainan, Taiwan, Nov. 18-19, 2011. |
| 160. |
C. C. Lee*, Y. S. Shih, and C. S. Wu, “Effective Moduli Prediction for Silicon Interposer with High Density of Cu Filled Through Silicon Via,” 2011 International Microsystems Packaging Assembly and Circuits Technology Conference (the 6th IMPACT Conference), Taipei, Taiwan. Oct. 19-21, 2011. (EI) |
| 161. |
C. C. Lee*, Y. S. Shih, C. S. Wu, C. H. Tsai, S. T. Yeh, and K. J. Chen, “Mechanical Reliability Enhancement of Flexible Packaging with OLED Display under Bending Loading Conditions,” 2011 International Microsystems Packaging Assembly and Circuits Technology Conference (the 6th IMPACT Conference), Taipei, Taiwan. Oct. 19-21, 2011. (EI) |
| 162. |
C. C. Lee*, Y. S. Shih, C. C. Huang, C. H. Tsai, S. T. Yeh, and K. J. Chen, “Systematical Analysis of Stress Evolution in OLED Flexible Devices by Using Finite Element Simulations,” 11th International Meeting on Information Display (iMiD 2011), Seoul, Korea, Oct. 11-15, 2011. |
| 163. |
T. Y. Hung, S. Y. Chiang, C. J. Huang, C. C. Lee, and K. N. Chiang*, “Thermal-Mechanical Behavior of the Bonding Wire for a Power Module Subjected to the Power Cycling Test,” 22th European Symposium Reliability of Electron Devices, Failure Physics and Analysis (ESREF 2011), pp. 1819-1823, Bordeaux, France, Oct. 3-7, 2011. (EI) |
| 164. |
C. C. Lee*, S. T. Chang, and B. F. Hsieh, “Impact of Channel Width and Dummy Length on Performance Enhancement in NMOSFETs with a Silicon-Carbon Alloy Stressor,” 7th International Conference on Si Epitaxy and Heterostructures (ICSI-7 2011), Leuven, Beligium, Aug. 28-Sep. 1, 2011. |
| 165. |
C. C. Lee*, S. T. Chang, C. C. Huang, and C. Y. Li, “Stress Impact of a Tensile CESL on the Nanoscale Strained NMOSFETs with a Silicon-Carbon Alloy Stressor,” 9th International Nanotech Symposium & Exhibition (NANO KOREA 2011), Seoul, Aug. 24-26, 2011. |
| 166. |
C. C. Lee*, S. T. Chang, C. C. Huang, and C. Y. Li, “Strain Engineering of Nanoscale Si PMOSFET Devices with SiGe Alloy Integrated with CESL Stressors,” 9th International Nanotech Symposium & Exhibition (NANO KOREA 2011), Seoul, Korea, Aug. 24-26, 2011. |
| 167. |
M. H. Lee*, T. H. Wu, S. T. Chang, and C. C. Lee, “Improved the Electrical Reliability of a-Si:H TFTs on Flexible Substrates with Saturation in Deep State,” 9th International Nanotech Symposium & Exhibition (NANO KOREA 2011), Seoul, Korea, Aug. 24-26, 2011. |
| 168. |
M. H. Lee*, S. T. Chang, C. W. Tai, J. D. Shen, and C. C. Lee, “Heterojunction with Intrinsic Thin Layer (HIT) Solar Cell under Mechanical Bending,” 37th IEEE Photovoltaic Specialist Conference, Seattle, Washington, Jun. 19-24, 2011. (EI) |
| 169. |
P. H. Sun, C. C. Lee, and S. T. Chang*, “A TCAD Simulation Study for Strained InGaAs Channel NMOSFET with a High-k Dielectric Oxide Layer and a Metal Gate Electrode,” 16th Workshop on Dielectric Materials (WoDiM 2010), Bratislava, Slovakia, Jun. 28-30, 2010. |
| 170. |
P. H. Sun, C. C. Lee, and S. T. Chang*, “Impact of Strain Engineering on InGaAs NMOSFET with a InGaAs Alloy Stressor,” International Conference on Metallurgical Coatings and Thin Films (ICMCTF 2010), San Diego, CA, USA, Apr. 26-30, 2010. |
| 171. |
B. F. Hsieh, S. T. Chang*, W. C. Wang, M. N. Liao, C. C. Lee, and J. Huang, “Strain Engineering of Nanoscale Strained Si MOS Devices,” 6th International Conference on Silicon Epitaxy and Heterostructures (ICSI-6), Los Angeles, California, USA, May 17-22, 2009. |
| 172. |
W. C. Wang, S. T. Chang*, J. Huang, and C. C. Lee, “Study of Nanoscale Strained Si NMOSFET with a Silicon-Carbon Alloy Stressor,” 6th International Conference on Silicon Epitaxy and Heterostructures (ICSI-6), Los Angeles, California, USA, May 17-22, 2009. |
| 173. |
W. C. Wang, C. C. Lee, J. Huang, and S. T. Chang*, “Impact of Strain Engineering on Nanoscale Strained Si NMOSFETs with a Silicon-Carbon Alloy Stressor,” International Conference on Metallurgical Coatings and Thin Films (ICMCTF 2009), San Diego, CA, USA, Apr. 27-May 1, 2009. |
| 174. |
C. C. Chiu, C. J. Huang, S. Y. Yang, C. C. Lee, and K. N. Chiang*, “Investigation of Delamination Mechanism of Cu/Low-k Stacking Structure in Flip Chip Packages,” Materials for Advanced Metallization Conference (MAM 2009), Grenoble, France, Mar. 8-11, 2009. |
| 175. |
W. C. Wang, C. C. Lee, J. Huang, and S. T. Chang*, “Adhesion Investigation of Low-k Films System Using 4-Point Bending Test,” 4th International Conference on Technological Advances of Thin Films & Surface Coatings (ThinFilms 2008), Singapore, Jul. 13-16, 2008. |
| 176. |
W. C. Wang, C. C. Lee, J. Huang, and S. T. Chang*, “Impact of Channel Width and Dummy Length on Performance Enhancement in PMOSFETs with a Silicon-Germanium Alloy Stressor,” 1st International Conference on nanoManufacturing (nanoMan2008), Singapore, Jul. 13-16, 2008. |
| 177. |
B. F. Hsieh, S. T. Chang*, C. C. Lee, J. Huang, and W. C. Wang, “Carrier Backscattering Characteristics of Nanoscale Strained CMOS Devices Featuring the Optimal Stress Engineering,” 1st International Conference on nanoManufacturing (nanoMan2008), Singapore, Jul. 13-16, 2008. |
| 178. |
C. C. Lee, S. T. Chang*, J. Huang, and W. C. Wang, “Impact of carbon on nanoscale strained Si NMOSFET with silicon-carbon alloy stressors,” 2nd International Conference on New Diamond and Nano Carbons (NDNC2008), Taipei, Taiwan, May 26-29, 2008. |
| 179. |
C. C. Lee, T. L. Chou, C. C. Chiu, C. C. Hsia, and K. N. Chiang*, “Cracking Energy Estimation of Ultra Low-k Package Using Novel Prediction Approach Combined with Global-Local Modeling Technique,” Materials for Advanced Metallization Conference (MAM 2008), Dresden, Germany, Mar. 2-5, 2008. |
| 180. |
C. C. Chiu, C. C. Lee, T. L. Chou, C. C. Hsia, and K. N. Chiang*, “Analysis of Cu/Low-K Structure under Back End of Line Process,” Materials for Advanced Metallization Conference (MAM 2008), Dresden, Germany, Mar. 2-5, 2008. |
| 181. |
C. C. Chiu, H. H. Chang, C. C. Lee, C. C. Hsia, and K. N. Chiang*, “Reliability of Interfacial Adhesion in a Multi-Level Interconnect Structure,” 18th European Symposium Reliability of Electron Devices, Failure Physics and Analysis (ESREF 2007), pp. 1506-1511, Arcachon, France, Oct. 8-12, 2007. |
| 182. |
K. C. Chang*, C. C. Lee, H. P. Pu, and M. J. Lii, “Enhancing Component Level Reliability of Pb-Free Flip Chip Package of Cu/Low-k Devices Using FEM-Based Sensitivity Analysis,” International Microsystems, Packaging, Assembly and Circuits Technology Conference (IMPACT 2007), pp. 75-78, Taipei, Taiwan, Oct. 1-3, 2007. (EI) |
| 183. |
C. C. Chiu, C. C. Lee, and K. N. Chiang*, “Study of Lamina Fracture of Cu/Low-k Interconnects Using the J-Integral Method,” 7th International Conference on Fracture and Strength of Solids (FEOFS 2007), Urumqi, China, Aug. 27-30, 2007. |
| 184. |
Robin C. J. Wang*, K. S. Chang-Liao, C. C. Lee, J. H. Lin, and K. Wu, “Resistance Characterization of Cu Stress-Induced Void Migration at Narrow Metal Finger Connected with Wide Lead,” International Conference on Metallurgical Coatings and Thin Films (ICMCTF 2007), San Diego, CA, USA, Apr. 23-27. 2007. |
| 185. |
Robin C. J. Wang*, K. S. Chang-Liao, A. S. Oates, C. C. Lee, L. D. Chen, C. C. Chiu, and K. Wu, “Copper Stress Migration at Narrow Metal Finger with Wide Lead,” Materials for Advanced Metallization Conference (MAM 2007), Bruges, Belgium, Mar. 4-7, 2007. |
| 186. |
C. C. Lee, K. N. Chiang*, T. C. Huang, K. C. Chang, C. H. Yao, and C. C. Hsia, “Systematic Investigation of Interfacial Fractures of Cu/Low-K Interconnects Using the J-Integral Method,” 2006 ANSYS Taiwan User Conference, pp. 143-145, Taipei, Taiwan, Oct. 30-31, 2006. |
| 187. |
Robin C. J. Wang*, L. D. Chen, C. C. Lee, K. Wu, and K. S. Chang-Liao, “Simulation for Copper Stress-Induced Voiding at Via Bottom and Its Microstructure Dependence,” 2006 ANSYS Taiwan User Conference, pp. 147-152, Taipei, Taiwan, Oct. 30-31, 2006. |
| 188. |
Robin C. J. Wang*, C. C. Lee, L. D. Chen, K. Wu, and K. S. Chang-Liao, “A study of Cu/Low-k Stress-induced Voiding at Via Bottom and Its Microstructure Effect,” 17th European Symposium Reliability of Electron Devices, Failure Physics and Analysis (ESREF 2006), pp. 1673-1678, Wuppertal, Germany, Oct. 3-6, 2006. |
| 189. |
C. M. Liu, C. C. Lee, H. T. Ku, C. C. Chiu, and K. N. Chiang, “Interconnect Design and Thermal Stress/Strain Analysis of Flip Chip Packaging,” International Conference on Experimental Mechanics 2006 (ICEM 2006), pp. 521-524, Jeju, Korea, Sep. 26-29, 2006. |
| 190. |
C. C. Lee, H. T. Ku, C. C. Chiu, and K. N. Chiang*, “A Novel Prediction Technique for Interfacial Crack Growth of Electronic Interconnect,” International Conference on Experimental Mechanics 2006 (ICEM 2006), pp. 533-536, Jeju, Korea, Sep. 26-29, 2006. |
| 191. |
C. C. Lee, C. C. Chiu, K. N. Chiang*, T. C. Huang, C. H. Yao, C. C. Hsia, and M. S. Liang, “Stability of J-integral Calculation in the Crack Growth of Copper/Low-k Stacked Structures,” 10th Intersociety Conference on Thermal and Thermomechanical phenomena in Electronic Systems (ITHERM 2006), pp. 885-891, San Diego, CA, USA, May 30-Jun. 2, 2006. (EI) |
| 192. |
Chien Chen Lee, K. M. Chen, Chang Chun Lee, C. C. Chiu, F. Kuo, and K. N. Chiang*, “Characteristics of SnAg3.0Cu0.5 Flip Chip Solder Bump Electromigration,” IEEE 56th Electronic Components and Technology Conference (56th ECTC), pp. 1164-1169, San Diego, CA, USA, May 30-Jun. 2, 2006. (EI) |
| 193. |
C. C. Lee, and K. N. Chiang*, “Reliability Analysis of WLCSP Using Tie-Release Crack Prediction Finite Element Technique,” ASME International Mechanical Engineering Congress & Exposition, EPP, Vol. 5, pp. 7-12, Orlando, Florida, USA, Nov. 5-11. 2005. (EI) |
| 194. |
M. C. Yew, C. C. Lee, S. M. Chang, and K. N. Chiang*, “Reliability Analysis of a New Soft Joint Protection Technology Using in WLCSP,” 2005 ANSYS Taiwan User Conference, pp.5.27-34, Hua-Lian, Taiwan, Oct. 23-25, 2005. |
| 195. |
C. C. Lee, C. M. Liu, and K. N. Chiang*, “Hybrid Solder Pad System for Enhancing the Reliability of Wafer Level Packaging,” 2005 ANSYS Taiwan User Conference, pp.5.43-49, Hua-Lian, Taiwan, Oct. 23-25, 2005. (Best Paper Award) |
| 196. |
M. C. Yew, C. C. Lee, S. M. Chang, and K. N. Chiang*, “A Novel WLCSP Using Soft Joint Protection Technology,” ASME International Electronic Packaging Technical Conference and Exhibition, San Francisco, CA, USA, Jul. 17-22, 2005. (EI) |
| 197. |
Chang-Chun Lee, Chien Chen Lee, C. Y. Cheng, and K. N. Chiang*, “Robust Design for the Reliability Optimization of WLCSP Using Response Surface Methodology,” IMAPS-TAIWAN 2005 International Technical Symposium, pp.209-214, Taipei, Taiwan, Jun. 23-25, 2005. |
| 198. |
Chien Chen Lee, Chang Chun Lee, and K. N. Chiang*, “Thermal Performance and Solder Joint Reliability for Board Level Assembly of Modified Leadframe Module,” 6th IEEE EuroSimE2005 conference, pp.553-558, Berlin, Germany, Apr. 18-20, 2005. (EI) |
| 199. |
C. M. Liu, C. C. Lee, and K. N. Chiang*, “Solder Joints Layout Design and Reliability Enhancement of Wafer Level Packaging,” 6th IEEE EuroSimE2005 conference, pp.234-241, Berlin, Germany, Apr. 18-20, 2005. (EI) |
| 200. |
C. C. Lee, S. M. Chang, and K. N. Chiang*, “Design of Double Layer WLCSP Using DOE with Factorial Analysis Technology,” 6th IEEE Electronics Packaging Technology Conference (EPTC 2004), pp.776-781, Singapore, Dec. 8-10, 2004. (EI) |
| 201. |
C. C. Lee, C. T. Peng, and K. N. Chiang*, “Design and Analysis of the CMOS Compatible Pressure Sensor Using Flip Chip and Flex Circuit Board Technologies,” Taiwan ANSYS Conference, pp.214-221, Nan-Tou, Taiwan, Nov. 7-9, 2004. |
| 202. |
C. C. Lee, H. C. Liu, and K. N. Chiang*, “3D Structure Design and Reliability Analysis of Wafer Level Package with Bubble-Like Stress Buffer Layer,” 9th Intersociety Conference on Thermal and Thermomechanical phenomena in Electronic Systems (ITHERM 2004), Vol. 2, pp.317-324, Las Vegas, USA, Jun. 1-4, 2004. (EI) |
| 203. |
C. C. Lee, K. N. Chiang*, W. K. Chen, and R. S. Chen, “Design and Analysis of Gasket Sealing for Cylinder Head in 2.0L Engine Operation,” Proceedings of the 27th Conference on Theoretical and Applied Mechanics, Tainan, Taiwan, Dec. 12-13, 2003. |
| 204. |
C. C. Lee, K. N. Chiang*, W. K. Chen, and R. S. Chen, “Design and Analysis of Temperature Distribution for 2.0L Cylinder Head in Engine Operation,” Proceedings of the 20th National Conference on Mechanical Engineering (CSME), Vol. 3, pp.1189-1196, Taipei, Taiwan, Dec. 5-6, 2003. |
| 205. |
C. C. Lee, C. M. Liu, C. T. Peng, and K. N. Chiang*, “Design and Analysis of Gasket Sealing for Cylinder Head in 2.0L Engine Operation,” 2003 ANSYS Taiwan User Conference, pp.267-274, Dou-Liou, Taiwan, Nov. 16-18, 2003. |
| 206. |
C. T. Peng, C. C. Lee, and K. N. Chiang*, “Design and Analysis of the CMOS Compatible Pressure Sensor Using Flip Chip and Flex Circuit Board Technologies,” ASME International Mechanical Engineering Congress & Exposition, Vol. 3, pp.43-49, Washington, D.C., USA, Nov. 15-21, 2003. (EI) |
| 207. |
C. C. Lee, and K. N. Chiang*, “Design and Reliability Analysis of Wafer Level Package with Bubble-Like Buffer Layer,” 2003 International Electronic Packaging Technical Conference and Exhibition, Vol. 2, pp.813-818, Maui, Hawaii, USA, Jul. 6-11, 2003. (EI) |
| |
|
|
|
|
|
US Patents： |
| 1. |
“Bump Structures and Packaged Structures Thereof,” Aug. 16, 2006. (In Pending) |
|
2. |
US 9,129,957 B1, “Method of Forming
a Metal Bump,” Sep. 8, 2015. |
3.
|
US 7,211,886, “Three-Dimensional Multichip Stack Electronic Packaging Structure,” May 1, 2007. |
| |
Taiwan Patents： |
| 1. |
No. I 840,249,
“Head Shape Correction Helmet,” Apr. 21, 2024.
（頭型矯正頭盔） |
2.
|
No. I 783,223,
“A Method for Detecting Optical-Electro
Characteristics of a Flexible Optoelectronic
Device,” Nov. 11, 2022. （可撓式之光電元件的光電特性檢測方法） |
|
3. |
No. I 597,816,
“Multilayered Thin Films Architecture,” Sep. 01,
2017. （多層薄膜結構） |
| 4. |
No. I 578,858,
“Oxygen/Vapour Obstructive Structure of Flexible
Panels,” Apr. 11, 2017. （可撓式面板之阻水氧層結構） |
5.
|
No. I 521,622,
“Method of Forming a Metal Bump,” Feb. 11, 2016.
（具金屬凸塊之形成方法） |
| 6. |
No. I 492,083, “Gate
Configuration with Stress Impact Amplification,” Jul. 11, 2015. （
具應力放大作用之閘極配置元件） |
7.
|
No. I 368,305, “Bump Structures and Packaged Structures Thereof,” Jul. 11, 2012. （凸塊結構及使用該凸塊結構的封裝結構） |
8.
|
No. I 248,669, “Three-Dimensional High-density of Wafer Level Structure of System Packaging with Plural Microelectronic Devices,” Feb. 1, 2006. (三維高密度多微電子元件之晶圓級系統封裝結構) |
9.
|
No. I 234,859, “Multi-Dimensional Stacking Electronic Packaging Structure,” Jun. 21, 2005. （多晶片堆疊立體電子構裝結構） |
10.
|
No. I 233,192, “The Wafer Level Structure of System Packaging with Stacked Packaging Units,” May 21, 2005. （堆疊多重封裝單元之晶圓級系統封裝結構） |
11.
|
No. 177,789, “Probe Card Structure for Wafer Level Testing,” May 11, 2003. （晶圓級測試卡之探針結構） |
12.
|
No. 170,790, “Electronic Testing Module with a Multiple Contact Unit,” Jan. 1, 2003. （具複數個接觸單元之電訊測試組件結構） |
|
|
|
|
1. |
Hsu, Y. Y., Chang, S. M.,
Lee, C. C. and Chiang, K. N., 2004, “Research on Self-Assembly Capability of Micro-Structure and Reliability Analysis of WLP Using Hybrid Micro Liquid Formation Theory,” ITRI Technique Report, July. (In Chinese) |
| 2. |
Lee, C. C. and Lin, Y. S., 2003, “COG Patent Survey Report,” ITRI Technique Report, October. (In Chinese) |
3.
|
Lee, C. C., 2011, “Structural Designs and Stress analysis of Silicon-Based LED Using MEMS Packaging Technology,” Journal of Chinese Institute of Engineers, Vol. 84, No. 3, pp. 44-54, Jun., 2011. (In Chinese) |
|
4. |
Lee, C. C. and Chiang, K. N.
(2014) Thermal Stress Induced Interfacial Failure
Modes of Advanced Electronic Devices. In Hetnarski
RB (Ed.) Encyclopedia of Thermal Stresses, Vol 1,
pp 5469 – 5495. Springer Dordrecht, Heidelberg, New
York, London. |
|
5. |
Lee, C. C.
, Huang, P. C., and He, J. Y., 2016, “Mechanical
Behavior Investigation of Advanced Flexible
Displays,” Journal of the Mechatronic Industry, Vol.
402, pp. 73-84, Sep., 2016. (In Chinese) |
|
6. |
K. C. Chen, C. Y. Huang, C. C. Wang,
C. C. Lee,
Y. Y. Liou, and Y. H. Chang, 2020, “Analysis of
Stress Induced by Wafer Warpage,” Journal of the
Mechatronic Industry, Vol. 447, pp. 42-49, Jun.,
2020. (In Chinese)
(Selected as the best article in the current Issue) |
|
7. |
Y. H. Chang, C. W. Wang, Y. C. Huang, and
C. C. Lee,
2021, “Derivation and Verification of Mechanical
Analytical Solutions About Multiple Neutral Axes in
Soft Electronics,” Journal of the Mechatronic
Industry, Vol. 455, pp. 1-9, Feb., 2021. (In
Chinese) |
|
8. |
Y. J. Lin, C. Y. Huang, K. C. Chen,
C. C. Lee,
Y. Y. Liou, and C. P. Chang, 2022, “Technology of
Thin Film Stress Simulation Analysis for Sputtering
Equipment,” Journal of the Mechatronic Industry,
Vol. 475, pp. 14-21, Oct., 2022. (In Chinese) |
9.
|
Y. P. Yang, M. S. Ju,
C. C. Lee,
T. H. Cheng, and Y. H. Lee, “Dynamics: Introductory
Mechanics with Movies,” National Taiwan University
(NTU) Press, Jan. 2023. (In Chinese, Book) |
|
|
|
1. |
“Development of Wafer Probe Card and Wafer Level Packaging,” NTHU cooperate ACE with Corp. |
| 2. |
“Optimization Investigation of Cylinder Head Structure,” NTHU cooperate with China Eingine Corp. |
3.
|
“Design, Manufacturing and Reliability Analysis of a WIT wafer level chip scale package (1/2),” Research project of National Science Council, Taiwan. |
| 4. |
“Design, Manufacturing and Reliability Analysis of a 3-D MCM Package (3/3),” Research project of National Science Council, Taiwan. |
| 5. |
“Design and Analysis of the Flip Chip Packaging Reliability Using Finite Element Parametric Studies,” NTHU cooperate with VIA Technology. |
| 6. |
“Research on Self-assembly Capability of Micro-structure and Reliability Analysis of WLP Using Hybrid Micro Liquid Formation Theory: 5X/16X Product Design and Development Procedure, Parametric Analysis and Development of WLCSP,” with ERSO/ITRI. |
| 7. |
“Design and Analysis of a Wafer Level Chip Scale Packaging with the Stress-Buffer Double-Pad Design (1/2),” Research project of National Science Council, Taiwan. |
| 8. |
“Design and Analysis of a Wafer Level Chip Scale Packaging with the Stress-Buffer Double-Pad Design (2/2),” Research project of National Science Council, Taiwan. |
| 9. |
“Design, Manufacturing and Reliability Analysis of a System in Wafer Lever Chip Scale Package (SiWLCSP) (1/3),” Research project of National Science Council, Taiwan. |
| 10. |
“Interfacial Stress, Adhesion, Crack Propagation Simulation of Multilayer and Stacked Structure of Low-k Chip,” NTHU cooperate with tsmc (Taiwan Semiconductor Manufacturing Company). |
| 11. |
“Fractured Investigation of Advanced Packaging Structure with Copper Chip and Low-k Material (1/3),” Research project of National Science Council, Taiwan. |
| 12. |
“Investigation of the Delamination and Kinking Behavior of Stacked Low-k Layers,” NTHU cooperate with tsmc (Taiwan Semiconductor Manufacturing Company). |
| 13. |
“Low-k Layer Adhesive Strength and Crack Behavior Prediction Using Uncertainty Analysis and Statistic Mechanics,” NTHU cooperate with tsmc (Taiwan Semiconductor Manufacturing Company). |
| 14. |
(Sub-Project Director) “Joint Reliability Investigation of Electric Module Using Theory of Fracture Mechanics & Simulation Approaches,” NTHU cooperate with Delta Electronics |
| 15. |
(Project Director) “Stress Simulation of Flexible OLED under Bending Force (I),” CYCU cooperate with DTC/ITRI. |
| 16. |
(Sub-Project Director) “Analysis of Safety and Produce of Inspection Essentials for Welded Structures of Mobile Cranes in Maintenance,” CYCU (Research & Development Center for Mechatronic Equipment) cooperate with Institute of Occupational Safety & Health. |
| 17. |
(Project Director) “Warpage Investigation and Reliability Analysis of 3D ICs Packaging Structures by using Through-Silicon Via Technology,” Research project of National Science Council. |
| 18. |
(Project Director) “Stress Simulation of Flexible OLED under Bending Force (II),” CYCU cooperate with DTC/ITRI. |
| 19. |
(Project Director) “Reliability Investigation of Flexible Device Packages Under Bending Fatigue Loadings,” Research project of National Science Council. |
| 20. |
(Project Director) “Stress Simulation of Flexible OLED under Bending Force (III),” CYCU cooperate with DTC/ITRI. |
| 21. |
(Sub-Project Director) “Analysis and Designs of Thermo-Mechanical Behaviors and Fracture Mechanics for Glass Interposer Technology under Accelerated Thermal-Cycling Tests,” CYCU cooperate with Unimicron Technology Corporation. |
| 22. |
(Project Director) “Stress Simulation of Flexible OLED under Bending Force (IV),” CYCU cooperate with DTC/ITRI. |
| 23. |
(Sub-Project Director) “Fracture Simulation and Analysis of SiN Layer During Au/Cu Bump Processes,” CYCU cooperate with ChipMOS Technologies Ltd. |
| 24. |
(Project Director) “Effect Investigation of Packaging Designs and Stress Analysis for Novel 3D-ICs on Structural Reliability and Electrical Performance of Devices,” Research project of National Science Council. (Project for Excellent Junior Research Investigators) |
| 25. |
(Project Director)
“Investigation of Reliability Analysis, Structural
Designs, and Assembly for 3D-ICs Packaging with
Ultra-thin Stacked Chips,” Research project of
Ministry of Science and Technology. (Project
for Ta-You Wu Memorial Award) |
| 26. |
(Project Director) “Diagnosis
and Analysis of Spring Break in Backslap Beds,”
Science assisted project of small and medium-size
enterprises concerned by Ministry of Economic
Affairs/Academic Circle. |
| 27. |
(Project Director) “Research
and Developement of Real-Time Measurement System for
Electro-optical Characteristics of Soft Display
Devices under Dynamic Loads,” Industry-university
cooperative research project of Ministry of Science
and Technology(1/2). (Development Type) |
| 28. |
(Project Director)
“Electro-Thermo-Mechanical Coupling Finite Element
Analysis of IGBT Module,” CYCU cooperate with
EORL/ITRI. |
| 29. |
(Project Director) “Mechanical
Simulations of Foldable AMOLED,” CYCU cooperate with DTC/ITRI. |
| 30. |
(Co-principal Investigator)
“The Design and Fabrication of Flexible Color
Lighting and Display Module (II). Research project
of Ministry of Science and Technology. |
| 31. |
(Project Director) “Analysis
and Investigation of Advanced FinFET Performance
Influenced by 3D-ICs Packaging Architecture,”
Research project of Ministry of Science and
Technology. (Project for Excellent Junior
Research Investigators) |
| 32. |
(Project Director) “Analysis of
Thermo-Mechanical Stress for Automotive Electronics
PCB,” NCHU cooperate with EORL/ITRI. |
| 33. |
(Project Director) “Research
and Developement of Real-Time Measurement System for
Electro-optical Characteristics of Soft Display
Devices under Dynamic Loads,” Industry-university
cooperative research project of Ministry of Science
and Technology(2/2). (Development Type) |
| 34. |
(Sub-Project Director)
“Reliability, Warpage and Electromigration Analysis
of Fan-Out Type WLCSP,” NTHU cooperate with
Powertech Technology Inc. |
| 35. |
(Project Director) “Simulations
and Optimizations of Mechanical Strengths for Soft
AMOLED,” NCHU cooperate with DTC/ITRI. |
| 36. |
(Project Director) “CTE
Structural Modelling and Thermo-Mechanical Stress
Analysis,” NCHU cooperate with EORL/ITRI. |
| 37. |
(Project Director) “Simulated
Analysis of Thermal Measured Process for the
Carbon-Fiber Rims of Bicycle,” NCHU cooperate with
Carbotec Industrial Co., Ltd. |
| 38. |
(Project Director) “Structural
Design and Mechanical Analysis of Novel Fan-Out Type
Package with the GaN-based High Power Chip Modules,”
Research project of Ministry of Science and
Technology. |
| 39. |
(Project Director)
“Deep-Enhancement Type of Stress Analysis,” NTHU
cooperate with Mechanical and Mechatronics Systems
Research Laboratories/ITRI. |
| 40. |
(Co-principal Investigator)
“Research and Development of Digital Manufacturing
Route for Advanced Cemented Carbide Mold (1/3),”
Additive manufacturing interdisciplinary research
project of Ministry of Science and Technology. |
| 41. |
(Project Director) “Stress
Simulation and Analysis for PECVD SiN Film,” NTHU
cooperate with Mechanical and Mechatronics Systems
Research Laboratories/ITRI. |
| 42. |
(Project Director) “Reliability
and Flexible Stress Analysis of Fan-Out Packaging
Structure,” NTHU cooperate with EORL/ITRI. |
| 43. |
(Project Director) “The
Interfacial Adhesion Investigation between PI and
Inorganic Coatings,” NTHU cooperate with EORL/ITRI. |
| 44. |
(Project Director) “Mechanical
Estimations of Intelligence System for Device
Packaging of Flexible Electronics,”
Industry-university cooperative research project of
Ministry of Science and Technology.
(Application Type) |
| 45. |
(Co-principal Investigator)
Regional promotion center program to clean energy
system integration and development of application
talent from Ministry of Education. |
| 46. |
(Co-principal Investigator)
“Research and Development of Digital Manufacturing
Route for Advanced Cemented Carbide Mold (2/3),”
Additive manufacturing interdisciplinary research
project of Ministry of Science and Technology. |
| 47. |
(Subproject Director) “Research
Project of Parallel Kinematic Manipulators (PKM)
Machine Tool-Structural and Thermal Designs,”
HWIN-NTHU Joint R&D Center. |
| 48. |
(Co-principal Investigator)
“Intelligent Advanced Hybrid Manufacturing System
for Next Generation Circuit Board and Electronics
(1/3),” Advanced manufacturing technology research
project of Ministry of Science and Technology. |
| 49. |
(Project Director) “Simulation
Analysis of Wafer Warpage,” NTHU cooperate with
Mechanical and Mechatronics Systems Research
Laboratories/ITRI. |
| 50. |
(Subproject Director) “Material
Optimization and the Simulation for the Use of Cu
Pillars to Improve Warping of PoP Applications (The
First Phase),” Unimicron-NTHU Joint R&D Center. |
| 51. |
(Co-principal Investigator)
“Research and Development of Parallel Kinematic
Machine Tools,” Industry-university cooperative
research project of Ministry of Science and
Technology (1/2). (Development Type)
|
| 52. |
(Project Director) “Development
and Reliability Demonstration for the Thinning
Packaging Technology of Critical High Power
Multichip Modules,” Research project of Ministry of
Science and Technology. |
| 53. |
(Project Director) “Predicting
Fatigue Lifetime of Solder Joints Subjected to
Thermal Cycling for High-Power Packaging Module,”
Delta Electronics, Inc.-NTHU Sun, Yun-Suan Lecture
joint research project. |
| 54. |
(Co-principal Investigator)
“The Development of High Energy Density and Safety
Cathode, Anode, Solid Electrolyte Materials Applied
in Electric Vehicle and Energy Storage System,”
Green energy technology joint R&D project of
Ministry of Science and Technology. |
| 55. |
(Co-principal Investigator)
“Intelligent Advanced Hybrid Manufacturing System
for Next Generation Circuit Board and Electronics
(2/3),” Advanced manufacturing technology research
project of Ministry of Science and Technology. |
| 56. |
(Subproject Director) “Material
Optimization and the Simulation for the Use of Cu
Pillars to Improve Warping of PoP Applications (The
Second Phase),” Unimicron-NTHU Joint R&D Center. |
| 57. |
(Project Director) “The AI
Basic Engineering for Heterogeneous Integration
Package Design Platform,” NTHU cooperate with
EORL/ITRI. |
| 58. |
(Project Director) “Simulation
Analysis and Calculation of Epitaxial Wafer Warpage
in MOCVD Equipment,” NTHU cooperate with Mechanical
and Mechatronics Systems Research Laboratories/ITRI. |
| 59. |
(Project Director) “Reliability
Lifetime Investigation of Packaging Module under
Power Cycling Test,”
Delta Electronics, Inc.-NTHU Sun, Yun-Suan Lecture
joint research project. |
| 60. |
(Co-principal Investigator)
“Research and Development of Parallel Kinematic
Machine Tools,” Industry-university cooperative
research project of Ministry of Science and
Technology (2/2). (Development Type)
|
| 61. |
(Co-principal Investigator)
“Intelligent Advanced Hybrid Manufacturing System
for Next Generation Circuit Board and Electronics
(3/3),” Advanced manufacturing technology research
project of Ministry of Science and Technology. |
| 62. |
(Project Director) “Analysis
and Research on Mechanical Reliability of Automotive
Power Module,” AcBel-NTHU research center project. |
| 63. |
(Project Director) “The High
Precision Semiconductor Heterogeneous Integrated
Packaging Design Platform,” NTHU cooperate with
EORL/ITRI. |
| 64. |
(Project Director) “FHE
Mechanical Coupling Electrical Behavior Real-Time
Measurement Commission,” NTHU cooperate with
EORL/ITRI. |
| 65. |
(Subproject Director) “Material
Optimization and the Simulation for the Use of Cu
Pillars to Improve Warping of PoP Applications (The
Third Phase),” Unimicron-NTHU Joint R&D Center. |
| 66. |
(Project Director) “Analysis
and Calculation of Stress Simulation for Sputtered
Chips,” NTHU cooperate with Mechanical and
Mechatronics Systems Research Laboratories/ITRI. |
| 67. |
(Co-principal Investigator)
“Well-Ordered Nanonetwork Metamaterial Thin Films:
Fabrication and Applications (1/3),” Nano technology
innovation application project of Ministry of
Science and Technology. |
| 68. |
(Project Director)
“Process-Induced Warpage Analysis of SiC Power
Module (1/2),” Delta Electronics, Inc.-NTHU Sun, Yun-Suan
Lecture joint research project. |
| 69. |
(Project Director) “Study on
Simulation Analysis of Stress Induced by Through
Glass Via Process,” NTHU cooperate with Shunt
Free Tech Co., Ltd. |
| 70. |
(Co-principal Investigator) “AI Assisted Key
Technology Development of Device and Package for 3D
IC Heterogeneous Integration,” NTHU competitive
research team project. |
| 71. |
(Project Director) “Simulation Technology of
Structural Warpage Optimization for Heterogeneous
Integrated Systems,” NTHU cooperate with EORL/ITRI. |
| 72. |
(Project Director) “Development and Optimization
of a Three-Dimensional Printing and Shaping Helmet
with Embedded Multiple Sensing Devices,” NTHU
external industry-university Chang Gung Hospital
cooperative research project. |
| 73. |
(Project Director) “Ultra Low Warpage of
Interconnect Materials and Multi-Layer Stacking
Design for High Performance Computing and AI
Chipsets,” NTHU-TSMC joint developed project. |
| 74. |
(Project Director) “Analysis of Temperature
History and Optimization of Structural Warpage in
Carrier Manufacturing Processes,” Unimicron-NTHU
Joint R&D Center. |
| 75. |
(Project Director) “Artificial
Intelligence-Assisted Glass Interposer
Stress-Induced Failure Mechanism Investigation and
Structural Design Optimization for Advanced
Packaging,” Research project of National Science and
Technology Council (NSTC). |
| 76. |
(Co-principal Investigator)
“Well-Ordered Nanonetwork Metamaterial Thin Films:
Fabrication and Applications (2/3),” Nano technology
innovation application project of National Science
and Technology Council (NSTC). |
| 77. |
(Project Director)
“Process-Induced Warpage Analysis of SiC Power
Module (2/2),” Delta Electronics, Inc.-NTHU Sun,
Yun-Suan Lecture joint research project. |
| 78. |
(Project Director) “Thermal
Shock Induced Life Prediction Analysis of Power
Module,” Delta Electronics, Inc.-NTHU Sun, Yun-Suan
Lecture joint research project. |
| 79. |
(Co-principal Investigator)
“Key Material Development and Cross-Disciplinary
Component Design and Integration (2/4),” Promote the
planning grant project of National Science and
Technology Council (NSTC). |
| 80. |
(Project Director) “AI-PRS
Function Applied to Coating Stress Simulation
Analysis and Process Research,” NTHU cooperate with
Mechanical and Mechatronics Systems Research
Laboratories/ITRI. |
| 81. |
(Co-principal Investigator)
“RDL/TSV Stress Management for Ultrahigh Bumping
Density Technology Development,” NYCU-TSMC joint
developed project. |
| 82. |
(Co-principal Investigator)
“Discussion on Mechanical Properties and Cracking
Modes of Thin Films at Microscale in Artificial
Intelligence-assisted 3DIC and Advanced Packaging
Technology,” NTHU-TSMC joint developed project. |
| 83. |
(Project Director) “Stress
Simulation Analysis of Heterogeneous Integrated
Architecture Under Thermal and Humidity Effects,”
NTHU cooperate with EORL/ITRI. |
| 84. |
(Project Director) “Stress
Simulation Analysis and Investigation of Carrier
Dismantling Process,” Unimicron-NTHU Joint R&D
Center. |
| 85. |
(Project Director)
“Investigation of Artificial Intelligence-Assisted
Structure Optimization and Material Characteristics
Enhancement on Additive Manufactured Helmet for
Deformational Plagiocephaly,” Research project of
National Science and Technology Council (NSTC). |
| 86. |
(Co-principal Investigator)
“Well-Ordered Nanonetwork Metamaterial Thin Films:
Fabrication and Applications (3/3),” Nano technology
innovation application project of National Science
and Technology Council (NSTC). |
| 87. |
(Co-principal Investigator)
“Key Material Development and Cross-Disciplinary
Component Design and Integration (3/4),” Promote the
planning grant project of National Science and
Technology Council (NSTC). |
| 88. |
(Project Director) “Thermal
Stress Analysis of Electronic Components Inside
Encapsulated Products During Thermal Cycles,” Delta
Electronics, Inc.-NTHU Sun, Yun-Suan Lecture joint
research project. |
| 89. |
(Project Director) “Simulation
Analysis of Thermal-Induced Structural Warpage and
Stress for LED Components,” NTHU cooperate with
EORL/ITRI. |
| 90. |
(Project Director) “Simulation
and Optimization Research on Side Dispensing
Structure of Module Strengthening Technology,” NTHU
cooperate with Wistron NeWeb Corporation. |
| 91. |
(Project Director) “Chip-Level
Mechanical Failure Simulation Platform: Passivation
Layer Crack,” NTHU-TSMC joint developed project. |
| 92. |
(Project Director) “The
Manufacturing and Optimization of 3D Printing Shaped
Helmet,” NTHU external industry-university Chang
Gung Hospital cooperative research project. |
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